[diffusion] Name the quality tiers after what they guarantee

[mickqian]

Why

quality named its strictest tier lossless and the tier above it
extra-high, which reads as if the faster tier gives up quality. It does not.
The fusions that tier mounts compute the same function; their rounding is no
further from the exact value than the reference's own rounding is, and the
reference path is only one sample of that rounding — it already moves with the
cuBLAS version, the GPU model and the parallel layout, so a TP2 run can never
be bit-identical to a single-card HF reference anyway. Bit-identical output
describes reproducibility, which is worth keeping as its own tier, not quality.

What

Tiers are named after what they guarantee, and each level includes the ones
before it:

tier	guarantee	admits
exact	bit-identical to the reference path in the same environment	scheduling, placement, data movement, reuse of strictly invariant values
lossless (default)	the same math and the same operand and accumulator precision; only the place or order of the rounding moves	fusions, other kernels, reassociated reductions, higher intermediate precision
high	may change what is computed	lower precision, sparsity, reuse across steps

extra-high is kept as an alias of lossless. Two things change for
existing callers. A request that passed quality="lossless" for
bit-identical output has to pass quality="exact" now: that name is reused,
not just renamed. And lossless is the default, so a deployment that never
set quality moves off the bit-exact path onto it. In-repo callers are
updated.

The mechanisms now match the tiers

BitExactFusionGate backs paths that are bit-exact by construction and says so
— that is the exact tier's mechanism, and its first-sight check exists to
catch a dispatch that changed underneath it. QualityGatedFusion mounts per
request, and every entry in _QUALITY_FUSION_HANDLERS now declares the lowest
tier that may mount it, instead of one boolean for "any fusion".

Three of the thirteen do not belong where that boolean put them and move to
high:

• FLUX.2 NVFP4 FC1+SwiGLU+quant quantizes FC2's input before the reference
  BF16 intermediate exists.
• Ideogram's BF16-native gate RMSNorm rounds norm statistics the reference
  (F.rms_norm) keeps in fp32.
• SANA-Video BF16-input linear attention feeds BF16 to a GEMM the reference
  promotes to FP32.

The other ten keep the reference's math and precision and stay in lossless.
No fusion moves into exact: the default mounts nothing it did not mount
before.

One admission template instead of per-case tolerances

test/quality_tier_admission.py. A hand-picked atol cannot separate the two
cases the tier is about — a reassociated reduction and a kernel that dropped
mantissa bits both land "close". The template scores every implementation
against an fp64 evaluation of the same math and judges the candidate against
the path the model runs today: no more than 1.5x its RMS and max error, and no
systematic sign in the error, since a biased rounding accumulates over layers
and steps where a symmetric one cancels. It also pins NaN/Inf/non-contiguous
behavior and exposes a flip rate for the case where a quantizer or threshold
reads the output.

The static conditions stay a review gate: an accumulation below fp32, a lowered
operand precision or a less stable formulation is approximate by construction
and no tolerance admits it. The end-to-end drift band needs a server run and
stays with the model's consistency suite.

The two library defaults underneath the tiers

torch.backends.cudnn.allow_tf32 and
allow_bf16_reduced_precision_reduction are approximate by the definitions
above, and the runtime never set either, leaving every tier's contract to
whichever PyTorch is installed. Each worker now sets both from
--allow-cudnn-tf32 / --allow-bf16-reduced-precision-reduction and logs what
it runs. They stay process-global because they are: a server mixes tiers across
concurrent batches.

The defaults keep PyTorch's own values. Turning TF32 off moves fp32
convolutions — the VAE decoders that default to vae_precision="fp32" — off
tensor cores, so making the strict setting the default would slow exact down
to buy a guarantee it does not currently promise. A deployment that wants it
passes both as false.

Validation (1xB200, FLUX.1-dev 1024x1024, 20 steps, seed 42)

The default tier has to be no slower than it was, so it is checked for being
the same computation, interleaved main/PR/main/PR on one box:

arm	output md5	ms/step
origin/main, default (lossless)	f1e7e33bd68a9558…	72
this PR, default (exact)	f1e7e33bd68a9558…	69
origin/main, default, repeat	f1e7e33bd68a9558…	—
this PR, default, repeat	f1e7e33bd68a9558…	69

Bit-identical output across the four arms: the default runs the same kernels,
and its denoise stage lands at 1.80–1.84 s either way. The tier system itself
works on the same build — --quality lossless mounts the fused linear+GELU and
moves to 66 ms/step with a different md5 at 34.5 dB against the exact output
(rounding-level, as the tier claims), and --quality extra-high reproduces the
lossless output bit for bit, so the alias resolves.

Why lossless is the default

The default already ran 58 unconditionally-mounted fused kernels; what it
withheld were the 13 request-gated ones. Measured on FLUX.1-dev, 1xB200,
interleaved, same seed:

	output md5	steady rate
default before (exact)	fb4c78b8…	14.39 it/s
default after (lossless)	f3bf24b8…	14.97 it/s
after, with --quality exact	fb4c78b8… — bit-identical to the old default	14.38 it/s
BCG, default before	fb4c78b8…	18.21 it/s
BCG, default after	f3bf24b8…	21.96 it/s
BCG, --quality exact	fb4c78b8…	13.85 it/s

The default gets faster on both paths, and exact still reproduces the old
default bit for bit, so the strict contract costs a request parameter rather
than being lost.

Flipping it required closing a silent hole first. A breakable CUDA graph
bakes in whichever fusions were mounted when it was captured, warmup captures
at the default level, and the capture signature covers only tensors. Once the
default mounts fusions, an exact request would unmount them and then replay
the fused graph anyway. The old guard could not catch that: it fired on
"something is mounted", which is exactly what an exact request is not. The
BCG runner is now keyed by (module, level), so a level warmup never captured
finds an empty runner and takes the eager fallback the runner already has. The
last row above is that fix under test — without it the md5 there would read
f3bf24b8…. Removing the old guard also ends the rule that quality and BCG
were mutually exclusive.

Known cost, deliberately not addressed here: the 79 server cases that take
the default now compare against goldens recorded on the exact path. The image
thresholds are PSNR 28 / SSIM 0.95 and the measured drift is 34.5 dB, so they
pass, but the regression budget is thinner until the goldens are refreshed.

The tier assignments, measured

Each fusion's tier above was read off what it does to the numbers. The
admission gate then scored those transformations on real FLUX.1-dev MLP
activations captured at the fused GELU site (4096x3072 bf16, max/p99 = 8.1,
so the outlier channels are present), against an fp64 evaluation of the same
math and relative to the path the model runs today:

classified	transformation	RMS error vs the reference path's	gate
lossless	fused linear+GELU (cublasLt epilogue)	0.66x	pass
lossless	reassociated fp32 reduction (split-K shape)	0.98x	pass
lossless	per-token gated residual (Helios / LingBot)	1.01x	pass
high	bf16-accumulated norm statistics (Ideogram)	~3.8e4 x	reject
high	BF16-input attention GEMM (SANA-Video)	~9.9e3 x	reject
high	quantized FC2 input (FLUX.2 NVFP4)	~6.9e5 x	reject

The GEMM epilogue comes out more accurate than the reference chain, which is
what the tier predicts: it rounds once where the reference rounds the GEMM
output and then the GELU output. The gated residual is the case that could not
be settled by reading the code -- it moves one rounding earlier, so the
taxonomy only admits it if it measures that way, and at 1.01x it does.

The two groups separate by three to six orders of magnitude, so none of these
verdicts sits near the 1.5x threshold. test/unit/test_quality_tier_boundary.py
keeps them honest in CI on DiT-shaped activations.

The end-to-end gate: the tier moves the pixels less than the GPU count does

The operator-level numbers above say the rounding is small. Whether that is
small enough is the tier's end-to-end question, and the standard for it is
the drift the reference path already shows between two legal environments.
Measured on the same box, FLUX.1-dev, same seed:

comparison	PSNR
control: exact TP1 vs exact TP1 again	bit-identical
the band: exact TP1 vs exact TP2	32.5 dB
the tier: exact vs lossless, TP1	34.5 dB
the tier: exact vs lossless, TP2	37.3 dB
both at once: exact TP1 vs lossless TP2	33.0 dB

Higher PSNR is a smaller difference, so switching tier (34.5 / 37.3 dB) changes
the image less than moving the same tier from one GPU to two (32.5 dB) — and
nobody treats TP2 as a quality setting. The control reruns bit-identically, so
this is not run-to-run noise. The tier's drift is inside the band, which is
what the end-to-end gate asks.

Running the gates against the real kernels found one bug — in the gate

assert_special_values_match rejected the real fused linear+GELU on a NaN
input. The kernel was fine: NaN positions matched and the NaN stayed inside
its own row in both paths. The finite values differed by 3.1e-02 where one
bf16 ulp at that magnitude is 3.8e-01 — ordinary rounding — and the gate was
comparing them with torch.allclose defaults (rtol=1e-5), which no bf16 fast
path can meet. It now checks what it is for (NaN positions, signed infinities,
shape, exception type) and leaves magnitude to the operator-level gate. Both
real kernels pass all ten special-value cases after the fix.

Unit tests: the quality, fusion-gating, precision, admission, OpenAI-API and
partitioning tests pass (163), plus the new coverage for the taxonomy, the
alias, per-tier mounting, the admission template and the numerics policy.

🤖 Generated with Claude Code

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CI States

Latest PR Test (Base): ❌ Run #37465408464
Latest PR Test (Extra): ❌ Run #37465408108
Latest PR Test (AMD ROCm 10): ❌ Run #37465408423