[AMD] Speed up DSV4 MoE weight loading from mmap views - #32315
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Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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Caution The consumer version of Gemini Code Assist on GitHub has been sunset. All code review activity has officially ceased. |
Co-authored-by: Cursor <cursoragent@cursor.com>
|
Caution The consumer version of Gemini Code Assist on GitHub has been sunset. All code review activity has officially ceased. |
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@amd-bot ci-status |
CI Status for PR #32315Merge verdict: PR CI is incomplete — do not read "green" as verified. This is an AMD-targeted PR, but every AMD stage-b/stage-c test was skipped because Caution This PR's real value is not verified by PR CI. The env-gated integration path ( Changed files: Executed CI failure attribution: AMD: 0 executed test failures (all stage-b/c skipped — not tested) · Others: 4 executed failures (0 related to this PR) AMD CI — incomplete (no downstream tests ran)
Other Executed Failures
Coverage — what actually ran
What to do before merge
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Enable the opt-in weight-view copy path only for the large-model jobs that exceeded their load budgets after the runner migration.
Sync the validation branch to b61cb5f so the compact-load A/B includes the ROCm AITER update used by the failing nightly runs.
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stage-b-test-1-gpu-large-amd (linux-mi300-1gpu-sglang, 1) |
Carry the upstream changes that landed since the last sync into the ROCm 7.2.4 files, which do not inherit them because they are separate copies: - Bump the two rocm724 stages to AITER d9e5ef7, matching the four existing flavors. They were the only stages left on 9127c94. - Regenerate pr-test-amd-rocm724.yml from the current pr-test-amd-rocm720.yml so it picks up the MI325 -> MI300 runner migration (sgl-project#31409), the sgl-kernel move to python/sglang/kernels/aot (sgl-project#32648), and the DSV4 MoE weight-loading env (sgl-project#32315), along with the max-parallel limits and timeout increases that came with them. The MI325 labels and the sgl-kernel test paths were the load-bearing ones: the former no longer resolve to a runner pool, and the latter point at a directory that no longer exists. Co-authored-by: Cursor <cursoragent@cursor.com>
Summary
DeepSeek-V4-Pro TP8 model loading was bottlenecked by 140,544 small MoE H2D copies per rank. Rank-local tensor views retained much larger safetensors mmap-backed storage, causing TP0/TP7 to spend 27-32 minutes in H2D while the other ranks took about 4 minutes.
This PR optionally copies only oversized or non-contiguous CPU weight views into independent contiguous storage immediately before H2D. It is disabled by default via
SGLANG_MOE_COPY_WEIGHT_VIEWS_BEFORE_H2Dand enabled in selected AMD DSV4, Qwen, and GPT-OSS validation jobs.Results
Additional MI300 nightly validation
The branch was synchronized through
b61cb5f9, including the ROCm AITER update used by the failing scheduled nightlies. All four previously timing-out large-model paths passed with the opt-in enabled:Validation:
Before

After

CPU tests cover zero-offset views, nonzero-offset views, non-contiguous tensors, and tensors that already have exact storage.
CI States
Latest PR Test (Base): ✅ Run #30602173081
Latest PR Test (Extra): ❌ Run #30602172994