test(temporal_spine): G3 latency-delta evidence for the #1064 flip gate - #1076
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Add benchmarks/temporal_spine_latency.py: the #739-style G3 flip-gate bench for the temporal-spine lane. Builds a >=10k-belief store carrying a real per-session TEMPORAL_NEXT spine (via backfill_temporal_spine), then times paired retrieve_v2 lane-off vs lane-on at the production operating point and applies the delta gate (p50 <= +5ms, p95 <= +50ms, tail <= 10x). A pre-timing probe reads last_lane_telemetry() and refuses to report if the lane produces zero candidates, so a ~0 delta cannot pass vacuously (the #981 trivial-null trap). Unit tests cover the percentile math, the gate boundaries, corpus/query generation + input validation, and a small store-backed check that the lane actually fires -- all deterministic, no wall-clock assertions.
…et (#1064) 10k-belief / 9.8k-edge spine, budget 1500: Dp50 <= +0.8ms, Dp95 +25-28ms (worst +28.4), tail ~2.1x -- inside the +5/+50/10x band. Lane fires 30/30 queries, byte-identical across 3 runs. G3 DONE.
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✨ Finishing Touches🧪 Generate unit tests (beta)
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PR-size soft capThis PR is over the advisory size threshold:
Bigger PRs collide with more open work, which under the parallel-session workflow tends to produce repeated This is advisory only — nothing is blocked. If the size is intentional (large refactor, module removal, generated code), apply the |
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[claim:review:Setr:2026-07-04T09:58:07Z] |
Review: LGTM ✅Reviewed as the author of the sibling G2 evidence (#1074), so this closes out the G3 leg of the same #1064 flip gate. Methodology is right. The gate is a same-corpus delta (spine_on − spine_off), not an absolute latency — correct per the #739/#754 reframe, since absolute ms is machine/load-dependent. Timing is The trivial-null trap is guarded. A ~0 delta is only meaningful if the lane actually did work; the bench refuses to report unless the lane fires on ≥1 query (the #981 trap), and the recorded run fires 30/30 (109 candidates → 82 packed). This is exactly the concern that matters for a default-off lane — good that it's enforced, not assumed. No flake surface in CI. The timed bench is run-on-demand; only pure-logic (percentile math, gate pass/fail on each dimension, boundary-inclusive Result passes with margin. 10k beliefs / 200 sessions / real 9,800-edge spine at the production point (1500/50): Δp50 ≤ +0.8 ms, worst Δp95 +28.4 ms — comfortably inside the +5 / +50 ms band even allowing for hardware variance. Design-doc claim matches the bench's gate. Gate checks: CI CLEAN, both commits signed, FF on main (includes the merged #1074 G2 evidence — design-doc additions don't collide), 0 unresolved threads, diff + commit messages discretion-clean. With G2 (#1074, merged) and G3 (this PR) both green, the only remaining flip-gate item is the G2 shadow-eval on a real backfilled store. Routing to the merge-train. |
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[release:review:Setr:2026-07-04T10:00:01Z] |
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merge-train: merged 9325f4f → |
Part of #1064 (temporal-spine flip gate). Produces the G3 — latency
delta (#739-style) evidence: what turning the temporal-spine retrieval
lane on costs at the production operating point.
What this does
benchmarks/temporal_spine_latency.py— the spine analog ofbfs_latency_v3.py(the #739 gate). It:chains, each with a strictly-increasing
created_at, then builds areal
TEMPORAL_NEXTspine viabackfill_temporal_spine(
beliefs − sessionsedges).last_lane_telemetry()for spine candidates) and refuses to report if it produces zero —
so a ~0 delta cannot pass vacuously (the Restore the deterministic HRR vocabulary-bridge expansion lane behind a default-off flag, then ablate (revisits #605/#897) #981 trivial-null trap).
retrieve_v2lane-off vs lane-on (onlyuse_temporal_spinediffers) and applies the delta gate:Δp50 ≤ +5 ms,Δp95 ≤ +50 ms, tail ratio ≤ 10×.Result (recorded in
docs/design/feature-temporal-spine.md)10,000 beliefs / 200 sessions / 9,800 spine edges, budget 1500 / l1-limit 50:
Lane fires on 30/30 queries (109 candidates → 82 packed survivors),
byte-identical across runs. Absolute latencies are machine/load-dependent
(dev baseline p50
64 ms); the gate is a same-corpus delta, as reframed+25 ms) is real, reproducible, andfor #739 in PR #754. The p95 cost (
inside the band. G3 PASS.
What this does not close
flake on shared runners. The timed bench is run-on-demand; only the
pure-logic + lane-fires unit tests run in CI.
and in the design doc are the reviewable artifact.
Testing
tests/test_temporal_spine_latency.py— 13 tests: percentile math,gate boundaries (inclusive), corpus/query generation + input
validation, and a store-backed lane-fires guard. All deterministic.