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[cpullvm] Add additional variants for testing Zephyr#309

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Apr 15, 2026
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[cpullvm] Add additional variants for testing Zephyr#309
jonathonpenix merged 1 commit into
qualcomm:qualcomm-softwarefrom
jonathonpenix:pr/zephyr_configs

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@jonathonpenix jonathonpenix commented Apr 10, 2026

Two variants added:

  • rv32gc ilp32d - Zephyr uses this extension/abi combo for quite
    a few hardfloat tests and we didn't have a compatible variant previously.
  • armv7m nopic - Our existing variant is built with -fPIC and, for tests on
    qemu_cortex_m3 at least, Zephyr has linker script snippets that /DISCARD/
    the .got. eld currently can't relax referencing the .got, leading to
    errors when building. So for now provide a nopic variant for testing. Note
    also that, since this is for Zephyr only, we don't build this for
    musl-embedded. This config should also be removed once this
    optimization/relaxation is implemented in eld.

@jonathonpenix jonathonpenix changed the title Pr/zephyr configs [cpullvm] Add additional variants for testing Zephyr Apr 10, 2026
@jonathonpenix jonathonpenix force-pushed the pr/zephyr_configs branch 2 times, most recently from 6c9f3ad to f69b2b6 Compare April 10, 2026 22:25
@jonathonpenix jonathonpenix marked this pull request as ready for review April 10, 2026 22:26
workflow_dispatch:
pull_request:
paths:
- '.github/workflows/zephyr-twister-tests.yml'
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What's this change for?

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It's just a temporary change to trigger the Zephyr tests on this PR

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LGTM, thanks, @jonathonpenix!

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jonathonpenix commented Apr 11, 2026

Zephyr test run that shows the changes working here: https://github.com/qualcomm/cpullvm-toolchain/actions/runs/24266991288?pr=309

I don't see any of the cortex-m3 errors about discarding the .got, and similarly I don't see the same issues with not having a matching multilib for rv32 ilp32d

Two variants added:
* rv32gc ilp32d - Zephyr uses this extension/abi combo for quite
  a few hardfloat tests and we didn't have a compatible variant previously.
* armv7m nopic - Our existing variant is built with -fPIC and, for tests on
  qemu_cortex_m3 at least, Zephyr has linker script snippets that /DISCARD/
  the .got. eld currently can't relax referencing the .got, leading to
  errors when building. So for now provide a nopic variant for testing. Note
  also that, since this is for Zephyr only, we don't build this for
  musl-embedded. This config should also be removed once this
  optimization/relaxation is implemented in eld.

Signed-off-by: Jonathon Penix <jpenix@qti.qualcomm.com>
@jonathonpenix jonathonpenix merged commit dc9b3c0 into qualcomm:qualcomm-software Apr 15, 2026
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@jonathonpenix jonathonpenix deleted the pr/zephyr_configs branch April 15, 2026 22:17
jonathonpenix added a commit to jonathonpenix/cpullvm-toolchain that referenced this pull request May 11, 2026
Discussing with Ana, sounds like we know that the user isn't using PIC and
we've had issues with 32bit Arm fPIC variants + Zephyr + eld in the past
(see qualcomm#309).

So let's make this nopic

Signed-off-by: Jonathon Penix <jpenix@qti.qualcomm.com>
jonathonpenix added a commit to jonathonpenix/cpullvm-toolchain that referenced this pull request May 12, 2026
Discussing with Ana, sounds like we know that the user isn't using PIC and
we've had issues with 32bit Arm fPIC variants + Zephyr + eld in the past
(see qualcomm#309).

So let's make this nopic

Signed-off-by: Jonathon Penix <jpenix@qti.qualcomm.com>
jonathonpenix added a commit to jonathonpenix/cpullvm-toolchain that referenced this pull request May 21, 2026
Discussing with Ana, sounds like we know that the user isn't using PIC and
we've had issues with 32bit Arm fPIC variants + Zephyr + eld in the past
(see qualcomm#309).

So let's make this nopic

Signed-off-by: Jonathon Penix <jpenix@qti.qualcomm.com>
jonathonpenix added a commit that referenced this pull request May 21, 2026
The intention here is to offer a variant for Cortex M7 users with fpv5-d16 enabled.

There's a few misc. things to note here:
- The normalized triple clang uses when `-mcpu=cortex-m7` is used is actually along the lines of `thumbv7em*` rather than the `thumb7m` we use here. Our `multilib.yaml.in` has mappings for these which we inherited from ATfE. So, align with what their configs seem to do and stick with thumbv7m.
- Picolibc is the only libc we want to support for this variant--a musl-embedded variant is intentionally omitted as we're moving away from musl-embedded.
- This variant is built without PIC support. The relevant user isn't using PIC and we've had issues with PIC + eld + Zephyr in the past for 32bit Arm targets (see #309) so let's default towards nopic.
- We build our other armv7m configurations with `-mno-unaligned-access` (and we don't have both aligned and unaligned variants like ATfE). But, the relevant user build here is resolving to `-munaligned-access` so I'm not going to force `-mno-unaligned-access` in the library build unless we have a particular need.

Signed-off-by: Jonathon Penix <jpenix@qti.qualcomm.com>
jonathonpenix added a commit to jonathonpenix/cpullvm-toolchain that referenced this pull request May 22, 2026
The intention here is to offer a variant for Cortex M7 users with fpv5-d16
enabled.

There's a few misc. things to note here:
- The normalized triple clang uses when `-mcpu=cortex-m7` is used is actually
  along the lines of `thumbv7em*` rather than the `thumb7m` we use here. Our
  `multilib.yaml.in` has mappings for these which we inherited from ATfE. So,
  align with what their configs seem to do and stick with thumbv7m.
- Picolibc is the only libc we want to support for this variant--a
  musl-embedded variant is intentionally omitted as we're moving away from
  musl-embedded.
- This variant is built without PIC support. The relevant user isn't using PIC
  and we've had issues with PIC + eld + Zephyr in the past for 32bit Arm
  targets (see qualcomm#309) so let's
  default towards nopic.
- We build our other armv7m configurations with `-mno-unaligned-access` (and we
  don't have both aligned and unaligned variants like ATfE). But, the relevant
  user build here is resolving to `-munaligned-access` so I'm not going to force
  `-mno-unaligned-access` in the library build unless we have a particular need.

Signed-off-by: Jonathon Penix <jpenix@qti.qualcomm.com>
jonathonpenix added a commit to jonathonpenix/cpullvm-toolchain that referenced this pull request May 27, 2026
The intention here is to offer a variant for Cortex M7 users with fpv5-d16
enabled.

There's a few misc. things to note here:
- The normalized triple clang uses when `-mcpu=cortex-m7` is used is actually
  along the lines of `thumbv7em*` rather than the `thumb7m` we use here. Our
  `multilib.yaml.in` has mappings for these which we inherited from ATfE. So,
  align with what their configs seem to do and stick with thumbv7m.
- Picolibc is the only libc we want to support for this variant--a
  musl-embedded variant is intentionally omitted as we're moving away from
  musl-embedded.
- This variant is built without PIC support. The relevant user isn't using PIC
  and we've had issues with PIC + eld + Zephyr in the past for 32bit Arm
  targets (see qualcomm#309) so let's
  default towards nopic.
- We build our other armv7m configurations with `-mno-unaligned-access` (and we
  don't have both aligned and unaligned variants like ATfE). But, the relevant
  user build here is resolving to `-munaligned-access` so I'm not going to force
  `-mno-unaligned-access` in the library build unless we have a particular need.

Signed-off-by: Jonathon Penix <jpenix@qti.qualcomm.com>
jonathonpenix added a commit that referenced this pull request May 27, 2026
The intention here is to offer a variant for Cortex M7 users with fpv5-d16
enabled.

There's a few misc. things to note here:
- The normalized triple clang uses when `-mcpu=cortex-m7` is used is actually
  along the lines of `thumbv7em*` rather than the `thumb7m` we use here. Our
  `multilib.yaml.in` has mappings for these which we inherited from ATfE. So,
  align with what their configs seem to do and stick with thumbv7m.
- Picolibc is the only libc we want to support for this variant--a
  musl-embedded variant is intentionally omitted as we're moving away from
  musl-embedded.
- This variant is built without PIC support. The relevant user isn't using PIC
  and we've had issues with PIC + eld + Zephyr in the past for 32bit Arm
  targets (see #309) so let's
  default towards nopic.
- We build our other armv7m configurations with `-mno-unaligned-access` (and we
  don't have both aligned and unaligned variants like ATfE). But, the relevant
  user build here is resolving to `-munaligned-access` so I'm not going to force
  `-mno-unaligned-access` in the library build unless we have a particular need.

Signed-off-by: Jonathon Penix <jpenix@qti.qualcomm.com>
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3 participants