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Memory Map

Peter Wilson edited this page Nov 23, 2022 · 1 revision

Memory Model

The Z80 has a 16 bit address bus giving a maximum addressable memory range of 64KB.

The Z80 SBC allows this memory to be divided into four 16KB 'pages' into which one of 256 'blocks', each 16KB, can be mapped into each of the four pages. The page mapping logic, when enabled, extends the address bus from 16 bits to 22 bits supporting an address range of 4MB. The mapped address bus is taken to the expansion connector as A0-A13, BA14-BA21.

After power on this page mapping is disabled and the Z80 sees the first 16K of physically addressed memory mapped into all 4 logical pages. Jumper P1 is usually set so that the first 16K of Flash is mapped into the CPU on reset. Generally the software in this first block of flash will contain boot code that configures the required memory map and enables the page mapping logic.

Installed Memory

The page mapping registers are 8 bits wide and select from 256 memory blocks numbered from 0 to 255. Assuming jumper P1 is in it's default position (Flash low) then the onboard memory comprises:

Blocks Description
0-1F 32x16KB blocks of Flash memory (512KB)
20-3F 32x16KB blocks of static RAM (512KB)

Video memory

This only applies if the separate VGA character based video card is installed.

The video card is memory mapped and is decoded as memory block 255. That is the top of the virtual memory range.

Within this 16K page there are two sections, one for the character memory and the other for the software defined character set:

Offset Description
0000-1000 4K character generator memory
2000-2FFF 4K character memory (1 byte per displayed character, 80 characters x 30 lines)

Each character is 8 pixels wide and 16 pixels tall (8x16). Within the character generator memory therefore each character definition comprises 16 consecutive bytes where each bit is one pixel.