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    734 repositories

    • OpenSTA-1

      Public
      C++
      •
      GNU General Public License v3.0
      •23•1•0•0•Updated Nov 9, 2024Nov 9, 2024

    • verilator-verification-features-tests

      Public
      SystemVerilog
      •
      Apache License 2.0
      •6•14•0•0•Updated Nov 9, 2024Nov 9, 2024

    • verible-indexer

      Public
      Python
      •
      Apache License 2.0
      •3•4•0•0•Updated Nov 9, 2024Nov 9, 2024

    • Cores-VeeR-EL2

      Public
      VeeR EL2 Core
      SystemVerilog
      •
      Apache License 2.0
      •75•2•0•1•Updated Nov 8, 2024Nov 8, 2024

    • yosys

      Public
      Yosys Open SYnthesis Suite
      C++
      •
      ISC License
      •892•1•4•0•Updated Nov 8, 2024Nov 8, 2024

    • hardware-components

      Public
      Python
      •
      Apache License 2.0
      •1•18•0•0•Updated Nov 8, 2024Nov 8, 2024

    • renode

      Public
      Renode - virtual development tool for multinode embedded networks
      RobotFramework
      •
      Other
      •289•29•0•0•Updated Nov 8, 2024Nov 8, 2024

    • crossterm

      Public
      Cross platform terminal library rust
      Rust
      •
      MIT License
      •280•0•0•0•Updated Nov 8, 2024Nov 8, 2024

    • tlib

      Public
      C++
      •
      Other
      •29•16•0•2•Updated Nov 8, 2024Nov 8, 2024

    • riscv-dv

      Public
      SV/UVM based instruction generator for RISC-V processor verification
      Python
      •
      Apache License 2.0
      •329•0•0•0•Updated Nov 8, 2024Nov 8, 2024

    • designer-media-files

      Public
      0•0•0•0•Updated Nov 8, 2024Nov 8, 2024

    • uvm-verilator

      Public
      SystemVerilog
      •
      Apache License 2.0
      •17•6•0•0•Updated Nov 8, 2024Nov 8, 2024

    • vendor-list

      Public
      Python
      •
      Apache License 2.0
      •0•1•0•0•Updated Nov 8, 2024Nov 8, 2024

    • verilator

      Public
      Verilator open-source SystemVerilog simulator and lint system
      C++
      •
      GNU Lesser General Public License v3.0
      •608•20•0•0•Updated Nov 8, 2024Nov 8, 2024

    • f4pga-website

      Public
      SCSS
      •
      Apache License 2.0
      •3•0•0•0•Updated Nov 8, 2024Nov 8, 2024

    • OpenROAD

      Public
      OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
      Verilog
      •
      BSD 3-Clause "New" or "Revised" License
      •552•1•0•0•Updated Nov 7, 2024Nov 7, 2024

    • rdimm-ddr5-tester

      Public
      Apache License 2.0
      •3•12•1•0•Updated Nov 7, 2024Nov 7, 2024

    • dts2repl

      Public
      Python
      •
      Apache License 2.0
      •5•20•2•1•Updated Nov 7, 2024Nov 7, 2024

    • renode-dpi-examples

      Public
      CMake
      •
      Apache License 2.0
      •2•3•1•2•Updated Nov 7, 2024Nov 7, 2024

    • rowhammer-tester

      Public
      Python
      •
      Apache License 2.0
      •16•55•11•0•Updated Nov 7, 2024Nov 7, 2024

    • pigweed-mimxrt595-samples

      Public
      C
      •
      Apache License 2.0
      •0•0•0•0•Updated Nov 7, 2024Nov 7, 2024

    • OpenSTA

      Public
      OpenSTA engine
      C++
      •
      GNU General Public License v3.0
      •173•0•0•0•Updated Nov 7, 2024Nov 7, 2024

    • litex

      Public
      Build your hardware, easily!
      C
      •
      Other
      •568•6•0•0•Updated Nov 7, 2024Nov 7, 2024

    • f4pga-arch-defs

      Public
      FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
      Jupyter Notebook
      •
      ISC License
      •113•1•0•10•Updated Nov 7, 2024Nov 7, 2024

    • jetson-orin-baseboard

      Public
      Baseboard targetting the NVIDIA Jetson Orin Nano and Jetson Orin NX
      Apache License 2.0
      •23•94•3•0•Updated Nov 6, 2024Nov 6, 2024

    • renode-verilator-integration

      Public
      This repository contains sample code integrating Renode with Verilator
      CMake
      •
      MIT License
      •8•16•3•0•Updated Nov 6, 2024Nov 6, 2024

    • bazel_rules_hdl

      Public
      Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
      Starlark
      •
      Apache License 2.0
      •43•0•0•0•Updated Nov 6, 2024Nov 6, 2024

    • renode-ws-proxy

      Public
      Python
      •
      Apache License 2.0
      •0•1•0•0•Updated Nov 6, 2024Nov 6, 2024

    • myst-editor

      Public
      JavaScript
      •
      Apache License 2.0
      •3•9•0•1•Updated Nov 6, 2024Nov 6, 2024

    • protoplaster

      Public
      Python
      •
      Apache License 2.0
      •2•11•0•0•Updated Nov 6, 2024Nov 6, 2024