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UCT/D2P: Multi-channel support with per-EP DPA address and RING_DB flag #11701
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -17,6 +17,7 @@ | |
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| template<ucs_device_level_t level> | ||
| UCS_F_DEVICE ucs_status_t uct_ib_d2p_post_desc(uct_ib_d2p_gpu_ep_t *ep, | ||
| unsigned channel_id, | ||
| uint8_t opcode, uint32_t length, | ||
| uint32_t lkey, uint64_t laddr, | ||
| uint32_t rkey, uint64_t raddr, | ||
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@@ -28,39 +29,41 @@ UCS_F_DEVICE ucs_status_t uct_ib_d2p_post_desc(uct_ib_d2p_gpu_ep_t *ep, | |
| uct_dev_exec_init<level>(lane_id, num_lanes); | ||
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| if (lane_id == 0) { | ||
| const long long depth = UCS_BIT(ep->log_depth); | ||
| unsigned long long pi = READ_ONCE(*ep->pi); | ||
| auto iface = ep->iface; | ||
| auto ch = iface->channels + (channel_id & iface->channel_mask); | ||
| const long long depth = UCS_BIT(iface->log_depth); | ||
| unsigned long long pi = READ_ONCE(*ch->pi); | ||
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| for (;;) { | ||
| unsigned long long ci = READ_ONCE(*ep->ci); | ||
| unsigned long long ci = READ_ONCE(*ch->ci); | ||
| if (static_cast<long long>(pi - ci) >= depth) { | ||
| status = UCS_ERR_NO_RESOURCE; | ||
| break; | ||
| } | ||
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| unsigned long long prev = atomicCAS(ep->pi, pi, pi + 1); | ||
| unsigned long long prev = atomicCAS(ch->pi, pi, pi + 1); | ||
| if (prev == pi) { | ||
| break; | ||
| } | ||
| pi = prev; | ||
| } | ||
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| if (status == UCS_INPROGRESS) { | ||
| const uint32_t slot = pi & UCS_MASK(ep->log_depth); | ||
| auto desc = reinterpret_cast<volatile uct_ib_d2p_desc_t*>( | ||
| ep->queue_base) + | ||
| slot; | ||
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| desc->opcode = opcode; | ||
| desc->length = length; | ||
| desc->qp_idx = ep->qp_idx; | ||
| desc->lkey = lkey; | ||
| desc->laddr = laddr; | ||
| desc->rkey = rkey; | ||
| desc->raddr = raddr; | ||
| desc->add = add; | ||
| desc->flags = flags; | ||
| const uint32_t owner = (pi >> ep->log_depth) & 0x1; | ||
| const uint32_t slot = pi & UCS_MASK(iface->log_depth); | ||
| auto desc = reinterpret_cast<volatile uct_ib_d2p_desc_t*>( | ||
| ch->queue_base) + | ||
| slot; | ||
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| desc->opcode = opcode; | ||
| desc->length = length; | ||
| desc->ep_idx = ep->ep_idx; | ||
| desc->lkey = lkey; | ||
| desc->laddr = laddr; | ||
| desc->rkey = rkey; | ||
| desc->raddr = raddr; | ||
| desc->add = add; | ||
| desc->flags = flags; | ||
| const uint32_t owner = (pi >> iface->log_depth) & 0x1; | ||
| asm volatile("st.release.sys.global.u8 [%0], %1;" :: | ||
| "l"(&desc->owner), "r"(owner) : "memory"); | ||
| } | ||
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@@ -74,38 +77,46 @@ template<ucs_device_level_t level> | |
| UCS_F_DEVICE ucs_status_t uct_ib_d2p_ep_put( | ||
| uct_device_ep_h tl_ep, const uct_device_mem_elem_t *src_uct_elem, | ||
| const uct_device_mem_elem_t *tl_mem_elem, const void *address, | ||
| uint64_t remote_address, size_t length, uint64_t flags, | ||
| uct_device_completion_t *comp) | ||
| uint64_t remote_address, size_t length, unsigned channel_id, | ||
| uint64_t flags, uct_device_completion_t *comp) | ||
| { | ||
| auto ep = reinterpret_cast<uct_ib_d2p_gpu_ep_t*>(tl_ep); | ||
| auto src_ib = reinterpret_cast<const uct_ib_md_device_mem_element_t*>( | ||
| src_uct_elem); | ||
| auto rem_ib = reinterpret_cast<const uct_ib_md_device_mem_element_t*>( | ||
| tl_mem_elem); | ||
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| return uct_ib_d2p_post_desc<level>( | ||
| ep, UCT_IB_D2P_OP_RDMA_WRITE, length, src_ib->lkey, | ||
| reinterpret_cast<uint64_t>(address), rem_ib->rkey, remote_address, | ||
| 0, comp == nullptr ? 0 : UCT_IB_D2P_FLAG_CQ_UPDATE); | ||
| uint16_t desc_flags = (comp != nullptr ? UCT_IB_D2P_FLAG_CQ_UPDATE : 0) | | ||
| (flags & UCT_DEVICE_FLAG_NODELAY ? | ||
| UCT_IB_D2P_FLAG_RING_DB : | ||
|
Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. NEXT PR: Maybe we can remove this translation and just use UCT_DEVICE_FLAG_NODELAY? |
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| 0); | ||
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| return uct_ib_d2p_post_desc<level>(ep, channel_id, UCT_IB_D2P_OP_RDMA_WRITE, | ||
| length, src_ib->lkey, | ||
| reinterpret_cast<uint64_t>(address), | ||
| rem_ib->rkey, remote_address, 0, | ||
| desc_flags); | ||
| } | ||
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| template<ucs_device_level_t level> | ||
| UCS_F_DEVICE ucs_status_t uct_ib_d2p_ep_atomic_add( | ||
| uct_device_ep_h tl_ep, const uct_device_mem_elem_t *tl_mem_elem, | ||
| uint64_t inc_value, uint64_t remote_address, uint64_t flags, | ||
| uct_device_completion_t *comp) | ||
| uint64_t inc_value, uint64_t remote_address, unsigned channel_id, | ||
| uint64_t flags, uct_device_completion_t *comp) | ||
| { | ||
| auto ep = reinterpret_cast<uct_ib_d2p_gpu_ep_t*>(tl_ep); | ||
| auto rem_ib = reinterpret_cast<const uct_ib_md_device_mem_element_t*>( | ||
| tl_mem_elem); | ||
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| return uct_ib_d2p_post_desc<level>(ep, UCT_IB_D2P_OP_ATOMIC_ADD, | ||
| sizeof(uint64_t), ep->atomic_result_lkey, | ||
| ep->atomic_result_va, rem_ib->rkey, | ||
| remote_address, inc_value, | ||
| comp == nullptr ? | ||
| 0 : | ||
| UCT_IB_D2P_FLAG_CQ_UPDATE); | ||
| uint16_t desc_flags = (comp != nullptr ? UCT_IB_D2P_FLAG_CQ_UPDATE : 0) | | ||
| (flags & UCT_DEVICE_FLAG_NODELAY ? | ||
| UCT_IB_D2P_FLAG_RING_DB : | ||
| 0); | ||
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| return uct_ib_d2p_post_desc<level>(ep, channel_id, UCT_IB_D2P_OP_ATOMIC_ADD, | ||
| sizeof(uint64_t), | ||
| ep->iface->atomic_result_lkey, | ||
| ep->iface->atomic_result_va, | ||
| rem_ib->rkey, remote_address, inc_value, | ||
| desc_flags); | ||
| } | ||
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| template<ucs_device_level_t level> | ||
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NEXT PR: ep_idx confused me, maybe we can come up with better name?