feat: Add value merge optimization

[jfecher]

Description

Problem*

Summary*

Found while working on #5771.

Adds an optimization for:

b0(v1: Field, v2: u1):
  v3 = not v2
  v4 = v2 as Field
  v5 = v3 as Field
  v6 = mul v4, v1
  v7 = mul v5, v1
  v8 = add v6, v7  // if v2 { v1 } else { v1 }

Down to v1.

Although we have a similar optimization directly on Instruction::IfElse, it's possible it can fail if references are involved and one value is a Load that is later resolved to be equal to the other value.

Additional Context

Documentation*

Check one:

• No documentation needed.
• Documentation included in this PR.
• [For Experimental Features] Documentation to be submitted in a separate PR.

PR Checklist*

• I have tested the changes locally.
• I have formatted the changes with Prettier and/or cargo fmt on default settings.

[github-actions]

Changes to circuit sizes

Generated at commit: 993ef9af1d4b029ad9635e148f287ea105144c61, compared to commit: a0afecdfbd49e5413bd38a489b3f6c539e1c25f2

🧾 Summary (10% most significant diffs)

Program	ACIR opcodes (+/-)	%	Circuit size (+/-)	%
slice_dynamic_index	-7 ✅	-0.71%	-14 ✅	-0.22%
nested_array_in_slice	-30 ✅	-3.40%	-30 ✅	-0.55%

---

Full diff report 👇

Program	ACIR opcodes (+/-)	%	Circuit size (+/-)	%
hashmap	63,971 (-163)	-0.25%	137,694 (-244)	-0.18%
slice_dynamic_index	975 (-7)	-0.71%	6,439 (-14)	-0.22%
nested_array_in_slice	853 (-30)	-3.40%	5,473 (-30)	-0.55%

[jfecher]

Closing this - the gains don't look too large for a check that'd occur on every add

[TomAFrench]

Seems like we'd get this for free from #6073?

[jfecher]

Seems like we'd get this for free from #6073?

Looks like it