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[Fusilli] Pick compiler fixes and change dispatch count checks for conv3d #2560

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Merged
sjain-stanford merged 4 commits into from
Oct 23, 2025
Merged

[Fusilli] Pick compiler fixes and change dispatch count checks for conv3d #2560

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d4d1f0e
bump and fix lit; cpu is also at single dispatch (global opt?)
sjain-stanford Oct 20, 2025
cf40ed7
failing test revealing memref issue
sjain-stanford Oct 21, 2025
321925f
bump
sjain-stanford Oct 22, 2025
1f4193e
fix from Aaron (set LD_LIBRARY_PATH in plugin build to pick libhipdnn…
sjain-stanford Oct 23, 2025
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6 changes: 5 additions & 1 deletion fusilli-plugin/test/integration/CMakeLists.txt
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Expand Up @@ -26,4 +26,8 @@ target_compile_definitions(fusilli_plugin_integration_tests PRIVATE
FUSILLI_PLUGIN_ENGINE_ID="${FUSILLI_PLUGIN_ENGINE_ID}"
)
# Register with CTest
gtest_discover_tests(fusilli_plugin_integration_tests)
gtest_discover_tests(fusilli_plugin_integration_tests
# Ensure that tests pick up libhipdnn_backend.so in build directory, not
# from the global TheRock install.
PROPERTIES ENVIRONMENT "LD_LIBRARY_PATH=${CMAKE_BINARY_DIR}/lib"
)
2 changes: 1 addition & 1 deletion sharkfuser/build_tools/docker/exec_docker_ci.sh
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Expand Up @@ -20,5 +20,5 @@ docker run --rm \
-v "${PWD}":/workspace \
${DOCKER_RUN_DEVICE_OPTS} \
--security-opt seccomp=unconfined \
ghcr.io/sjain-stanford/compiler-dev-ubuntu-24.04:main@sha256:93301b1799d0f77a8c811c70c1a1cf407955910949b097d3a5df5943d0b8e1e5 \
ghcr.io/sjain-stanford/compiler-dev-ubuntu-24.04:main@sha256:d52a5eb21ce21509f5fd1064074ba34f7ad8810c5d5c6caff9790149c8e05b3c \
"$@"
6 changes: 3 additions & 3 deletions sharkfuser/samples/convolution/conv_fprop_nchw_kcrs.cpp
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Expand Up @@ -19,7 +19,7 @@ using namespace fusilli;

TEST_CASE("Convolution fprop; X (NCHW), W (KCRS); 1x1 conv; no padding",
"[conv][graph]") {
int64_t n = 16, c = 128, h = 64, w = 64, k = 256, r = 1, s = 1;
int64_t n = 4, c = 4, h = 4, w = 4, k = 4, r = 1, s = 1;

auto build_new_graph = [=](const Handle &handle) {
auto graph = std::make_shared<Graph>();
Expand Down Expand Up @@ -98,7 +98,7 @@ TEST_CASE("Convolution fprop; X (NCHW), W (KCRS); 1x1 conv; no padding",
std::vector<half> result;
FUSILLI_REQUIRE_OK(yBuf->read(handle, result));
for (auto val : result)
REQUIRE(val == half(128.0f));
REQUIRE(val == half(4.0f));

// Execute graph a few times.
constexpr size_t numIters = 1;
Expand All @@ -109,5 +109,5 @@ TEST_CASE("Convolution fprop; X (NCHW), W (KCRS); 1x1 conv; no padding",
result.clear();
FUSILLI_REQUIRE_OK(yBuf->read(handle, result));
for (auto val : result)
REQUIRE(val == half(128.0f));
REQUIRE(val == half(4.0f));
}
5 changes: 2 additions & 3 deletions sharkfuser/tests/lit/test_conv_asm_emitter_ndhwc_kdrsc.cpp
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Expand Up @@ -66,9 +66,8 @@
// LINALG-CHECK: %[[OUTT:.+]] = linalg.transpose ins(%[[OUT]] : tensor<16x256x1x64x32xf32>) outs(%{{.+}} : tensor<16x1x64x32x256xf32>) permutation = [0, 2, 3, 4, 1]
// LINALG-CHECK: %{{.+}} = hal.tensor.alias wait(%{{.+}}) => %[[OUTT]] : tensor<16x1x64x32x256xf32> to %[[ARG0]] : !hal.buffer_view
//
// TODO(iree-org/iree#22312): Change to 1 after IREE compiler fix
// AMDGPU-STATS-CHECK: "dispatch-count": 2
// CPU-STATS-CHECK: "dispatch-count": 2
// AMDGPU-STATS-CHECK: "dispatch-count": 1
// CPU-STATS-CHECK: "dispatch-count": 1
//
// clang-format on

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