GitHub - nekoday/ElecDesign-Contest-University-2021: Adjustable sinusoidal signal generator based on FPGA

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Adjustable sinusoidal signal generator based on FPGA

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Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
KW_crl.bsf		KW_crl.bsf
LED_display_module.v		LED_display_module.v
LED_display_module_inst.v		LED_display_module_inst.v
Sine_10bit_1024.mif		Sine_10bit_1024.mif
choose_wave_module.v		choose_wave_module.v
dac_module.v		dac_module.v
dds_sin_rom.v		dds_sin_rom.v
detect_module.v		detect_module.v
detect_module_inst.v		detect_module_inst.v
kw_crl.v		kw_crl.v
kw_out.v		kw_out.v
pll_clk.ppf		pll_clk.ppf
pll_clk.qip		pll_clk.qip
pll_clk.v		pll_clk.v
rx_bps_module.v		rx_bps_module.v
rx_bps_module_inst.v		rx_bps_module_inst.v
rx_control_module.v		rx_control_module.v
rx_control_module_inst.v		rx_control_module_inst.v
rx_top.bsf		rx_top.bsf
rx_top.qpf		rx_top.qpf
rx_top.qsf		rx_top.qsf
rx_top.v		rx_top.v
rx_top_assignment_defaults.qdf		rx_top_assignment_defaults.qdf
sinrom1.qip		sinrom1.qip
sinrom1.v		sinrom1.v
sinrom1_inst.v		sinrom1_inst.v