Bug 1669938 - Promote widening dot product wasm SIMD instruction to a…

…ccepted status. r=jseward

Background: WebAssembly/simd#127

For the widening dot product instruction:

- remove the internal 'Experimental' opcode suffix in the C++ code
- remove the guard on the instruction in all the C++ decoders
- move the test cases from simd/experimental.js to simd/ad-hack.js

I have checked that current V8 and wasm-tools use the same opcode
mapping.  V8 in turn guarantees the correct mapping for LLVM and
binaryen.

Differential Revision: https://phabricator.services.mozilla.com/D92929

js/src/jit-test/tests/wasm/simd/ad-hack.js

@@ -730,6 +730,29 @@ for ( let [op, memtype, rop, resultmemtype] of
         testIt(a,b);
 }
 
+// Widening integer dot product
+
+var ins = wasmEvalText(`
+  (module
+    (memory (export "mem") 1 1)
+    (func (export "run")
+      (v128.store (i32.const 0)
+        (i32x4.dot_i16x8_s (v128.load (i32.const 16)) (v128.load (i32.const 32))))))`);
+
+var xs = [5, 1, -4, 2, 20, -15, 12, 3];
+var ys = [6, 0, -7, 3, 8, -1, -3, 7];
+var ans = [xs[0]*ys[0] + xs[1]*ys[1],
+           xs[2]*ys[2] + xs[3]*ys[3],
+           xs[4]*ys[4] + xs[5]*ys[5],
+           xs[6]*ys[6] + xs[7]*ys[7]];
+
+var mem16 = new Int16Array(ins.exports.mem.buffer);
+var mem32 = new Int32Array(ins.exports.mem.buffer);
+set(mem16, 8, xs);
+set(mem16, 16, ys);
+ins.exports.run();
+var result = get(mem32, 0, 4);
+assertSame(result, ans);
 
 // Splat, with and without constants (different code paths in ion)
 

js/src/jit-test/tests/wasm/simd/experimental.js

@@ -63,35 +63,6 @@ function V128StoreExpr(addr, v) {
             SimdPrefix, V128StoreCode, 4, varU32(0)];
 }
 
-// Widening integer dot product, https://github.com/WebAssembly/simd/pull/127
-
-var ins = wasmEval(moduleWithSections([
-    sigSection([v2vSig]),
-    declSection([0]),
-    memorySection(1),
-    exportSection([{funcIndex: 0, name: "run"},
-                   {memIndex: 0, name: "mem"}]),
-    bodySection([
-        funcBody({locals:[],
-                  body: [...V128StoreExpr(0, [...V128Load(16),
-                                              ...V128Load(32),
-                                              SimdPrefix, varU32(I32x4DotSI16x8Code)])]})])]));
-
-var xs = [5, 1, -4, 2, 20, -15, 12, 3];
-var ys = [6, 0, -7, 3, 8, -1, -3, 7];
-var ans = [xs[0]*ys[0] + xs[1]*ys[1],
-           xs[2]*ys[2] + xs[3]*ys[3],
-           xs[4]*ys[4] + xs[5]*ys[5],
-           xs[6]*ys[6] + xs[7]*ys[7]];
-
-var mem16 = new Int16Array(ins.exports.mem.buffer);
-var mem32 = new Int32Array(ins.exports.mem.buffer);
-set(mem16, 8, xs);
-set(mem16, 16, ys);
-ins.exports.run();
-var result = get(mem32, 0, 4);
-assertSame(result, ans);
-
 // Zero-extending SIMD load, https://github.com/WebAssembly/simd/pull/237
 
 for ( let [opcode, k, log2align, cons, cast] of [[V128Load32ZeroCode, 4, 2, Int32Array, Number],

js/src/jit/MacroAssembler.h

@@ -2667,8 +2667,7 @@ class MacroAssembler : public MacroAssemblerSpecific {
   inline void pseudoMaxFloat64x2(FloatRegister rhs, FloatRegister lhsDest)
       DEFINED_ON(x86_shared, arm64);
 
-  // Widening/pairwise integer dot product (experimental as of August, 2020)
-  // https://github.com/WebAssembly/simd/pull/127
+  // Widening/pairwise integer dot product
 
   inline void widenDotInt16x8(FloatRegister rhs, FloatRegister lhsDest)
       DEFINED_ON(x86_shared, arm64);

js/src/jit/x86-shared/CodeGenerator-x86-shared.cpp

@@ -2606,7 +2606,7 @@ void CodeGenerator::visitWasmBinarySimd128(LWasmBinarySimd128* ins) {
     case wasm::SimdOp::F64x2PMin:
       masm.pseudoMinFloat64x2(rhs, lhsDest);
       break;
-    case wasm::SimdOp::I32x4DotSI16x8Experimental:
+    case wasm::SimdOp::I32x4DotSI16x8:
       masm.widenDotInt16x8(rhs, lhsDest);
       break;
     default:

js/src/jit/x86-shared/MacroAssembler-x86-shared-inl.h

@@ -2013,6 +2013,8 @@ void MacroAssembler::pseudoMaxFloat64x2(FloatRegister rhs,
   vmovapd(scratch, lhsDest);
 }
 
+// Widening/pairwise integer dot product
+
 void MacroAssembler::widenDotInt16x8(FloatRegister rhs, FloatRegister lhsDest) {
   vpmaddwd(Operand(rhs), lhsDest, lhsDest);
 }

js/src/wasm/WasmBaselineCompile.cpp

@@ -14978,8 +14978,7 @@ bool BaseCompiler::emitBody() {
             CHECK_NEXT(dispatchVectorBinary(PMaxF64x2));
           case uint32_t(SimdOp::F64x2PMin):
             CHECK_NEXT(dispatchVectorBinary(PMinF64x2));
-          case uint32_t(SimdOp::I32x4DotSI16x8Experimental):
-            CHECK_SIMD_EXPERIMENTAL();
+          case uint32_t(SimdOp::I32x4DotSI16x8):
             CHECK_NEXT(dispatchVectorBinary(DotI16x8));
           case uint32_t(SimdOp::I8x16Neg):
             CHECK_NEXT(dispatchVectorUnary(NegI8x16));

js/src/wasm/WasmConstants.h

@@ -612,7 +612,7 @@ enum class SimdOp {
   I32x4MinU = 0xb7,
   I32x4MaxS = 0xb8,
   I32x4MaxU = 0xb9,
-  I32x4DotSI16x8Experimental = 0xba,
+  I32x4DotSI16x8 = 0xba,
   // AvgrU = 0xbb
   // Unused = 0xbc
   // Unused = 0xbd

js/src/wasm/WasmIonCompile.cpp

@@ -4851,9 +4851,7 @@ static bool EmitBodyExprs(FunctionCompiler& f) {
           case uint32_t(SimdOp::F32x4Ne):
           case uint32_t(SimdOp::F64x2Eq):
           case uint32_t(SimdOp::F64x2Ne):
-            CHECK(EmitBinarySimd128(f, /* commutative= */ true, SimdOp(op.b1)));
-          case uint32_t(SimdOp::I32x4DotSI16x8Experimental):
-            CHECK_SIMD_EXPERIMENTAL();
+          case uint32_t(SimdOp::I32x4DotSI16x8):
             CHECK(EmitBinarySimd128(f, /* commutative= */ true, SimdOp(op.b1)));
           case uint32_t(SimdOp::V128AndNot):
           case uint32_t(SimdOp::I8x16Sub):

js/src/wasm/WasmOpIter.cpp

@@ -434,7 +434,7 @@ OpKind wasm::Classify(OpBytes op) {
         case SimdOp::F32x4PMax:
         case SimdOp::F64x2PMin:
         case SimdOp::F64x2PMax:
-        case SimdOp::I32x4DotSI16x8Experimental:
+        case SimdOp::I32x4DotSI16x8:
           WASM_SIMD_OP(OpKind::Binary);
         case SimdOp::I8x16Neg:
         case SimdOp::I16x8Neg:

js/src/wasm/WasmValidate.cpp

@@ -1056,10 +1056,7 @@ static bool DecodeFunctionBodyExprs(const ModuleEnvironment& env,
           case uint32_t(SimdOp::F32x4PMin):
           case uint32_t(SimdOp::F64x2PMax):
           case uint32_t(SimdOp::F64x2PMin):
-            CHECK(iter.readBinary(ValType::V128, &nothing, &nothing));
-
-          case uint32_t(SimdOp::I32x4DotSI16x8Experimental):
-            CHECK_SIMD_EXPERIMENTAL();
+          case uint32_t(SimdOp::I32x4DotSI16x8):
             CHECK(iter.readBinary(ValType::V128, &nothing, &nothing));
 
           case uint32_t(SimdOp::I8x16Neg):