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feat(cuda): add shareable cuMem IPC lifecycle - #33

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yatesdr merged 13 commits into
local-inference-lab:integration/glm53-upstream-consolidationfrom
devinkuhn:fix/r10-cumem-cuda-ipc
Sep 1, 2026
Merged

feat(cuda): add shareable cuMem IPC lifecycle#33
yatesdr merged 13 commits into
local-inference-lab:integration/glm53-upstream-consolidationfrom
devinkuhn:fix/r10-cumem-cuda-ipc

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@devinkuhn

@devinkuhn devinkuhn commented Sep 1, 2026

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Summary

Adds the direct CUDA-IPC/cuMem lifecycle required by LMCache multiprocess serving on the Jovian Judgement GLM-5.3 stack.

  • POSIX-FD cuMem export/import with same-UID SCM_RIGHTS broker
  • allocation mapping deduplication and alias refcounts
  • retryable unregister/re-register without cudaDeviceReset
  • partial-registration and partial-wrapper rollback
  • active STORE/RETRIEVE leases so unregister/reaping cannot unmap live transfers
  • stream-ordered failed-store reservation abort
  • scheduler heartbeat lifecycle and bounded completion dedup
  • failed registration preserves the prior live transfer context
  • recurrent kernel groups receive independent object groups when separation is enabled
  • padded physical block strides and retained-window retrieval from the prerequisite geometry commit

Dependency

This branch includes the already-submitted padded hybrid geometry prerequisite (1a31bb39). The new feature commits are:

  • d016561a recurrent object-group isolation
  • 1fee4175 shareable cuMem IPC lifecycle
  • 40e28112 scheduler heartbeat lifecycle
  • 05d3fb01 context lifetime hardening
  • c43866fa transfer completion invariants

Runtime qualification

Four RTX PRO 6000 Blackwell GPUs, vLLM MTP3 TP4/DCP4, exact 1M context, batch 8192, FP8 KV:

  • one LMCache server PID mapped on GPUs 0-3
  • 4 physical imports / 184 aliases
  • object groups [0,1,2,3]
  • cold 32k coherent; 64 L1 objects / 818,151,424 bytes
  • vLLM-only restart automatically unregisters to 0 imports/aliases while preserving L1
  • warm reload coherent with 24,576 external cached tokens
  • unrelated raw sentinel coherent
  • 524,288-token request coherent at the qualified 31.25 GiB KV/GPU profile
  • no Xid, illegal access, EngineDead, OOM, or restart in final accepted gates

Tests

  • final focused regression set: 160 passed
  • independent exact-image selected set: 116 passed
  • prior cuMem/object-group suite: 129 passed
  • Ruff format/check, py_compile, git diff --check passed

Duplicate-work note

No open LMCache PR implements this D22-style shareable cuMem broker/import lifecycle. Existing vLLM PR LMCache#526 carries the coupled vLLM/Jovian integration work.

AI assistance disclosure

AI assistance was used in preparing this contribution.

Apple FCU Fleet and others added 11 commits August 31, 2026 15:25
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Avoid suppressing completed recurrent chunks when scheduler accounting advances ahead of exact boundary handoffs.

Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Advertise the scheduler fence only for LMCache MP producers with recurrent cache groups so ordinary and consumer configurations retain run-ahead.

Co-authored-by: Cursor <cursoragent@cursor.com>
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coderabbitai Bot commented Sep 1, 2026

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@yatesdr
yatesdr merged commit ad54381 into local-inference-lab:integration/glm53-upstream-consolidation Sep 1, 2026
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2 participants