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Make ios_base::xalloc non-atomic with LIBCXX_ENABLE_THREADS=OFF. - #208356

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efriedma-quic:xalloc-no-atomic
Jul 14, 2026
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Make ios_base::xalloc non-atomic with LIBCXX_ENABLE_THREADS=OFF.#208356
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efriedma-quic:xalloc-no-atomic

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762b77a moved the definition of "xindex" out of the header, and in the process dropped the _LIBCPP_HAS_THREADS check. Re-add the check to maintain the status quo.

The discussion on #198994 indicates it's not clear whether LIBCXX_ENABLE_THREADS=OFF is actually supposed to mean single-threaded. But it clearly does in practice: atomic_support.h uses non-atomic ops when threads are disabled, and a few other APIs have explicit non-atomic fallback paths.

My team ran into this trying to run libc++ tests for a RISC-V core without the "a" extension.

762b77a moved the definition of "xindex" out of the header, and in the
process dropped the _LIBCPP_HAS_THREADS check.  Re-add the check to
maintain the status quo.

The discussion on llvm#198994
indicates it's not clear whether LIBCXX_ENABLE_THREADS=OFF is actually
supposed to mean single-threaded.  But it clearly does in practice:
atomic_support.h uses non-atomic ops when threads are disabled, and
a few other APIs have explicit non-atomic fallback paths.
@efriedma-quic
efriedma-quic requested a review from a team as a code owner July 9, 2026 00:09
@llvmorg-github-actions llvmorg-github-actions Bot added the libc++ libc++ C++ Standard Library. Not GNU libstdc++. Not libc++abi. label Jul 9, 2026
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Author: Eli Friedman (efriedma-quic)

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762b77a moved the definition of "xindex" out of the header, and in the process dropped the _LIBCPP_HAS_THREADS check. Re-add the check to maintain the status quo.

The discussion on #198994 indicates it's not clear whether LIBCXX_ENABLE_THREADS=OFF is actually supposed to mean single-threaded. But it clearly does in practice: atomic_support.h uses non-atomic ops when threads are disabled, and a few other APIs have explicit non-atomic fallback paths.

My team ran into this trying to run libc++ tests for a RISC-V core without the "a" extension.


Full diff: https://github.com/llvm/llvm-project/pull/208356.diff

1 Files Affected:

  • (modified) libcxx/src/ios.cpp (+7)
diff --git a/libcxx/src/ios.cpp b/libcxx/src/ios.cpp
index 2e049098740dc..db6ca50f7f6ca 100644
--- a/libcxx/src/ios.cpp
+++ b/libcxx/src/ios.cpp
@@ -122,7 +122,14 @@ static size_t __ios_new_cap(size_t __req_size, size_t __current_cap) { // Precon
 }
 
 int ios_base::xalloc() {
+#if _LIBCPP_HAS_THREADS
   constinit static atomic<int> xindex = 0;
+#else
+  // If we don't have atomics, fall back to single-threaded implementation.
+  // FIXME: Should "single-threaded" be a separate option from
+  // _LIBCPP_HAS_THREADS?
+  static int xindex = 0;
+#endif // _LIBCPP_HAS_THREADS
   return xindex++;
 }
 

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See also #131365 .

@ldionne ldionne left a comment

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I dislike the fact that this is basically a workaround for not having a proper setup with the atomics library, but this is a pragmatic and minimal restoration of previous behavior that changed unintentionally, so I think it's acceptable.

@efriedma-quic
efriedma-quic merged commit 3eb929b into llvm:main Jul 14, 2026
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@efriedma-quic efriedma-quic added this to the LLVM 23.x Release milestone Jul 14, 2026
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/cherry-pick 3eb929b

@llvmbot

llvmbot commented Jul 14, 2026

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/pull-request #209631

dyung pushed a commit to llvmbot/llvm-project that referenced this pull request Jul 15, 2026
…m#208356)

762b77a moved the definition of "xindex" out of the header, and in the
process dropped the _LIBCPP_HAS_THREADS check. Re-add the check to
maintain the status quo.

The discussion on llvm#198994
indicates it's not clear whether LIBCXX_ENABLE_THREADS=OFF is actually
supposed to mean single-threaded. But it clearly does in practice:
atomic_support.h uses non-atomic ops when threads are disabled, and a
few other APIs have explicit non-atomic fallback paths.

My team ran into this trying to run libc++ tests for a RISC-V core
without the "a" extension.

(cherry picked from commit 3eb929b)
jonathonpenix pushed a commit to qualcomm/cpullvm-toolchain that referenced this pull request Jul 15, 2026
This test failed due to ios_base::xalloc requiring an atomic function
namely atomic_fetch_add_4.
llvm/llvm-project#208356 fixes it by removing
dependence on atomic.

Signed-off-by: Shreeyash Pandey <shrpand@qti.qualcomm.com>
pedroMVicente pushed a commit to pedroMVicente/llvm-project that referenced this pull request Jul 15, 2026
…m#208356)

762b77a moved the definition of "xindex" out of the header, and in the
process dropped the _LIBCPP_HAS_THREADS check. Re-add the check to
maintain the status quo.

The discussion on llvm#198994
indicates it's not clear whether LIBCXX_ENABLE_THREADS=OFF is actually
supposed to mean single-threaded. But it clearly does in practice:
atomic_support.h uses non-atomic ops when threads are disabled, and a
few other APIs have explicit non-atomic fallback paths.

My team ran into this trying to run libc++ tests for a RISC-V core
without the "a" extension.
dyung pushed a commit to llvmbot/llvm-project that referenced this pull request Jul 22, 2026
…m#208356)

762b77a moved the definition of "xindex" out of the header, and in the
process dropped the _LIBCPP_HAS_THREADS check. Re-add the check to
maintain the status quo.

The discussion on llvm#198994
indicates it's not clear whether LIBCXX_ENABLE_THREADS=OFF is actually
supposed to mean single-threaded. But it clearly does in practice:
atomic_support.h uses non-atomic ops when threads are disabled, and a
few other APIs have explicit non-atomic fallback paths.

My team ran into this trying to run libc++ tests for a RISC-V core
without the "a" extension.

(cherry picked from commit 3eb929b)
efriedma-quic added a commit to qualcomm/cpullvm-toolchain that referenced this pull request Jul 23, 2026
This test failed due to ios_base::xalloc requiring an atomic function
namely atomic_fetch_add_4.
llvm/llvm-project#208356 fixes it by removing
dependence on atomic.

(Cherry-pick from qualcomm-software to release branch.)

Signed-off-by: Shreeyash Pandey <shrpand@qti.qualcomm.com>
Co-authored-by: Shreeyash Pandey <shrpand@qti.qualcomm.com>
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