[CostModel][X86] Add more realistic v8i64/v16i32 + v8f64/v16f32 add reduction costs

[RKSimon]

Fixes failure to fold to v16i32 reduction on ax512 targets

We still need to determine better CostKind values - but that can wait until #194621 is complete

[github-actions]

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git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/X86/X86TargetTransformInfo.cpp --diff_from_common_commit

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View the diff from clang-format here.

diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 8838fd7e7..06508e947 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5672,15 +5672,15 @@ X86TTIImpl::getArithmeticReductionCost(unsigned Opcode, VectorType *ValTy,
   };
 
   static const CostTblEntry AVX512FCostTbl[] = {
-    { ISD::FADD,  MVT::v8f64,   4 },
-    { ISD::FADD,  MVT::v16f32,  5 },
-    { ISD::ADD,   MVT::v8i64,   4 },
-    { ISD::ADD,   MVT::v16i32,  6 },
+      {ISD::FADD, MVT::v8f64, 4},
+      {ISD::FADD, MVT::v16f32, 5},
+      {ISD::ADD, MVT::v8i64, 4},
+      {ISD::ADD, MVT::v16i32, 6},
   };
 
   static const CostTblEntry AVX512BWCostTbl[] = {
-    { ISD::ADD,   MVT::v32i16,  7 },
-    { ISD::ADD,   MVT::v64i8,   4 },
+      {ISD::ADD, MVT::v32i16, 7},
+      {ISD::ADD, MVT::v64i8, 4},
   };
 
   int ISD = TLI->InstructionOpcodeToISD(Opcode);