Skip to content

[X86] regenerate fcopysign test checks #183710

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
RKSimon merged 1 commit into from
Feb 27, 2026
Merged

[X86] regenerate fcopysign test checks #183710

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/X86/vec-copysign-avx512.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
define <4 x float> @v4f32(<4 x float> %a, <4 x float> %b) nounwind {
; CHECK-LABEL: v4f32:
; CHECK: ## %bb.0:
; CHECK-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm0
; CHECK-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 ^ (m32bcst & (xmm0 ^ xmm1))
; CHECK-NEXT: retq
%tmp = tail call <4 x float> @llvm.copysign.v4f32( <4 x float> %a, <4 x float> %b )
ret <4 x float> %tmp
Expand All @@ -14,7 +14,7 @@ define <4 x float> @v4f32(<4 x float> %a, <4 x float> %b) nounwind {
define <8 x float> @v8f32(<8 x float> %a, <8 x float> %b) nounwind {
; CHECK-LABEL: v8f32:
; CHECK: ## %bb.0:
; CHECK-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm0
; CHECK-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (m32bcst & (ymm0 ^ ymm1))
; CHECK-NEXT: retq
%tmp = tail call <8 x float> @llvm.copysign.v8f32( <8 x float> %a, <8 x float> %b )
ret <8 x float> %tmp
Expand All @@ -23,7 +23,7 @@ define <8 x float> @v8f32(<8 x float> %a, <8 x float> %b) nounwind {
define <16 x float> @v16f32(<16 x float> %a, <16 x float> %b) nounwind {
; CHECK-LABEL: v16f32:
; CHECK: ## %bb.0:
; CHECK-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm1, %zmm0
; CHECK-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 ^ (m32bcst & (zmm0 ^ zmm1))
; CHECK-NEXT: retq
%tmp = tail call <16 x float> @llvm.copysign.v16f32( <16 x float> %a, <16 x float> %b )
ret <16 x float> %tmp
Expand All @@ -32,7 +32,7 @@ define <16 x float> @v16f32(<16 x float> %a, <16 x float> %b) nounwind {
define <2 x double> @v2f64(<2 x double> %a, <2 x double> %b) nounwind {
; CHECK-LABEL: v2f64:
; CHECK: ## %bb.0:
; CHECK-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
; CHECK-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 ^ (m64bcst & (xmm0 ^ xmm1))
; CHECK-NEXT: retq
%tmp = tail call <2 x double> @llvm.copysign.v2f64( <2 x double> %a, <2 x double> %b )
ret <2 x double> %tmp
Expand All @@ -41,7 +41,7 @@ define <2 x double> @v2f64(<2 x double> %a, <2 x double> %b) nounwind {
define <4 x double> @v4f64(<4 x double> %a, <4 x double> %b) nounwind {
; CHECK-LABEL: v4f64:
; CHECK: ## %bb.0:
; CHECK-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm0
; CHECK-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (m64bcst & (ymm0 ^ ymm1))
; CHECK-NEXT: retq
%tmp = tail call <4 x double> @llvm.copysign.v4f64( <4 x double> %a, <4 x double> %b )
ret <4 x double> %tmp
Expand All @@ -50,7 +50,7 @@ define <4 x double> @v4f64(<4 x double> %a, <4 x double> %b) nounwind {
define <8 x double> @v8f64(<8 x double> %a, <8 x double> %b) nounwind {
; CHECK-LABEL: v8f64:
; CHECK: ## %bb.0:
; CHECK-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm1, %zmm0
; CHECK-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 ^ (m64bcst & (zmm0 ^ zmm1))
; CHECK-NEXT: retq
%tmp = tail call <8 x double> @llvm.copysign.v8f64( <8 x double> %a, <8 x double> %b )
ret <8 x double> %tmp
Expand Down
36 changes: 18 additions & 18 deletions llvm/test/CodeGen/X86/vec_fcopysign.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@ define <2 x double> @fcopysign_v2f64(<2 x double> %a0, <2 x double> %a1) nounwin
;
; X86-AVX512-LABEL: fcopysign_v2f64:
; X86-AVX512: # %bb.0:
; X86-AVX512-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}{1to2}, %xmm1, %xmm0
; X86-AVX512-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 ^ (m64bcst & (xmm0 ^ xmm1))
; X86-AVX512-NEXT: retl
;
; X64-SSE-LABEL: fcopysign_v2f64:
Expand All @@ -52,7 +52,7 @@ define <2 x double> @fcopysign_v2f64(<2 x double> %a0, <2 x double> %a1) nounwin
;
; X64-AVX512-LABEL: fcopysign_v2f64:
; X64-AVX512: # %bb.0:
; X64-AVX512-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
; X64-AVX512-NEXT: vpternlogq {{.*#+}} xmm0 = xmm1 ^ (m64bcst & (xmm0 ^ xmm1))
; X64-AVX512-NEXT: retq
%t = call <2 x double> @llvm.copysign.v2f64(<2 x double> %a0, <2 x double> %a1)
ret <2 x double> %t
Expand Down Expand Up @@ -85,7 +85,7 @@ define <4 x float> @fcopysign_v4f32(<4 x float> %a0, <4 x float> %a1) nounwind {
;
; X86-AVX512-LABEL: fcopysign_v4f32:
; X86-AVX512: # %bb.0:
; X86-AVX512-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}{1to4}, %xmm1, %xmm0
; X86-AVX512-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 ^ (m32bcst & (xmm0 ^ xmm1))
; X86-AVX512-NEXT: retl
;
; X64-SSE-LABEL: fcopysign_v4f32:
Expand Down Expand Up @@ -113,7 +113,7 @@ define <4 x float> @fcopysign_v4f32(<4 x float> %a0, <4 x float> %a1) nounwind {
;
; X64-AVX512-LABEL: fcopysign_v4f32:
; X64-AVX512: # %bb.0:
; X64-AVX512-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm0
; X64-AVX512-NEXT: vpternlogd {{.*#+}} xmm0 = xmm1 ^ (m32bcst & (xmm0 ^ xmm1))
; X64-AVX512-NEXT: retq
%t = call <4 x float> @llvm.copysign.v4f32(<4 x float> %a0, <4 x float> %a1)
ret <4 x float> %t
Expand Down Expand Up @@ -160,7 +160,7 @@ define <8 x half> @fcopysign_v8f16(ptr %p0, ptr %p1) nounwind {
; X86-AVX512-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-AVX512-NEXT: vmovdqa (%ecx), %xmm1
; X86-AVX512-NEXT: vpbroadcastd {{.*#+}} xmm0 = [2147450879,2147450879,2147450879,2147450879]
; X86-AVX512-NEXT: vpternlogd $202, (%eax), %xmm1, %xmm0
; X86-AVX512-NEXT: vpternlogd {{.*#+}} xmm0 = mem ^ (xmm0 & (xmm1 ^ mem))
; X86-AVX512-NEXT: retl
;
; X64-SSE-LABEL: fcopysign_v8f16:
Expand Down Expand Up @@ -194,7 +194,7 @@ define <8 x half> @fcopysign_v8f16(ptr %p0, ptr %p1) nounwind {
; X64-AVX512: # %bb.0:
; X64-AVX512-NEXT: vmovdqa (%rdi), %xmm1
; X64-AVX512-NEXT: vpbroadcastd {{.*#+}} xmm0 = [2147450879,2147450879,2147450879,2147450879]
; X64-AVX512-NEXT: vpternlogd $202, (%rsi), %xmm1, %xmm0
; X64-AVX512-NEXT: vpternlogd {{.*#+}} xmm0 = mem ^ (xmm0 & (xmm1 ^ mem))
; X64-AVX512-NEXT: retq
%a0 = load <8 x half>, ptr %p0, align 16
%a1 = load <8 x half>, ptr %p1, align 16
Expand Down Expand Up @@ -244,7 +244,7 @@ define <4 x double> @fcopysign_v4f64(<4 x double> %a0, <4 x double> %a1) nounwin
;
; X86-AVX512-LABEL: fcopysign_v4f64:
; X86-AVX512: # %bb.0:
; X86-AVX512-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}{1to4}, %ymm1, %ymm0
; X86-AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (m64bcst & (ymm0 ^ ymm1))
; X86-AVX512-NEXT: retl
;
; X64-SSE-LABEL: fcopysign_v4f64:
Expand Down Expand Up @@ -277,7 +277,7 @@ define <4 x double> @fcopysign_v4f64(<4 x double> %a0, <4 x double> %a1) nounwin
;
; X64-AVX512-LABEL: fcopysign_v4f64:
; X64-AVX512: # %bb.0:
; X64-AVX512-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm0
; X64-AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm1 ^ (m64bcst & (ymm0 ^ ymm1))
; X64-AVX512-NEXT: retq
%t = call <4 x double> @llvm.copysign.v4f64(<4 x double> %a0, <4 x double> %a1)
ret <4 x double> %t
Expand Down Expand Up @@ -321,7 +321,7 @@ define <8 x float> @fcopysign_v8f32(<8 x float> %a0, <8 x float> %a1) nounwind {
;
; X86-AVX512-LABEL: fcopysign_v8f32:
; X86-AVX512: # %bb.0:
; X86-AVX512-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %ymm1, %ymm0
; X86-AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (m32bcst & (ymm0 ^ ymm1))
; X86-AVX512-NEXT: retl
;
; X64-SSE-LABEL: fcopysign_v8f32:
Expand Down Expand Up @@ -354,7 +354,7 @@ define <8 x float> @fcopysign_v8f32(<8 x float> %a0, <8 x float> %a1) nounwind {
;
; X64-AVX512-LABEL: fcopysign_v8f32:
; X64-AVX512: # %bb.0:
; X64-AVX512-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm0
; X64-AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = ymm1 ^ (m32bcst & (ymm0 ^ ymm1))
; X64-AVX512-NEXT: retq
%t = call <8 x float> @llvm.copysign.v8f32(<8 x float> %a0, <8 x float> %a1)
ret <8 x float> %t
Expand Down Expand Up @@ -406,7 +406,7 @@ define <16 x half> @fcopysign_v16f16(ptr %p0, ptr %p1) nounwind {
; X86-AVX512-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-AVX512-NEXT: vmovdqu (%ecx), %ymm1
; X86-AVX512-NEXT: vpbroadcastd {{.*#+}} ymm0 = [2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879]
; X86-AVX512-NEXT: vpternlogd $202, (%eax), %ymm1, %ymm0
; X86-AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = mem ^ (ymm0 & (ymm1 ^ mem))
; X86-AVX512-NEXT: retl
;
; X64-SSE-LABEL: fcopysign_v16f16:
Expand Down Expand Up @@ -445,7 +445,7 @@ define <16 x half> @fcopysign_v16f16(ptr %p0, ptr %p1) nounwind {
; X64-AVX512: # %bb.0:
; X64-AVX512-NEXT: vmovdqu (%rdi), %ymm1
; X64-AVX512-NEXT: vpbroadcastd {{.*#+}} ymm0 = [2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879]
; X64-AVX512-NEXT: vpternlogd $202, (%rsi), %ymm1, %ymm0
; X64-AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = mem ^ (ymm0 & (ymm1 ^ mem))
; X64-AVX512-NEXT: retq
%a0 = load <16 x half>, ptr %p0, align 16
%a1 = load <16 x half>, ptr %p1, align 16
Expand Down Expand Up @@ -505,7 +505,7 @@ define <8 x double> @fcopysign_v8f64(<8 x double> %a0, <8 x double> %a1) nounwin
;
; X86-AVX512-LABEL: fcopysign_v8f64:
; X86-AVX512: # %bb.0:
; X86-AVX512-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}{1to8}, %zmm1, %zmm0
; X86-AVX512-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 ^ (m64bcst & (zmm0 ^ zmm1))
; X86-AVX512-NEXT: retl
;
; X64-SSE-LABEL: fcopysign_v8f64:
Expand Down Expand Up @@ -541,7 +541,7 @@ define <8 x double> @fcopysign_v8f64(<8 x double> %a0, <8 x double> %a1) nounwin
;
; X64-AVX512-LABEL: fcopysign_v8f64:
; X64-AVX512: # %bb.0:
; X64-AVX512-NEXT: vpternlogq $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %zmm1, %zmm0
; X64-AVX512-NEXT: vpternlogq {{.*#+}} zmm0 = zmm1 ^ (m64bcst & (zmm0 ^ zmm1))
; X64-AVX512-NEXT: retq
%t = call <8 x double> @llvm.copysign.v8f64(<8 x double> %a0, <8 x double> %a1)
ret <8 x double> %t
Expand Down Expand Up @@ -595,7 +595,7 @@ define <16 x float> @fcopysign_v16f32(<16 x float> %a0, <16 x float> %a1) nounwi
;
; X86-AVX512-LABEL: fcopysign_v16f32:
; X86-AVX512: # %bb.0:
; X86-AVX512-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}{1to16}, %zmm1, %zmm0
; X86-AVX512-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 ^ (m32bcst & (zmm0 ^ zmm1))
; X86-AVX512-NEXT: retl
;
; X64-SSE-LABEL: fcopysign_v16f32:
Expand Down Expand Up @@ -631,7 +631,7 @@ define <16 x float> @fcopysign_v16f32(<16 x float> %a0, <16 x float> %a1) nounwi
;
; X64-AVX512-LABEL: fcopysign_v16f32:
; X64-AVX512: # %bb.0:
; X64-AVX512-NEXT: vpternlogd $228, {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to16}, %zmm1, %zmm0
; X64-AVX512-NEXT: vpternlogd {{.*#+}} zmm0 = zmm1 ^ (m32bcst & (zmm0 ^ zmm1))
; X64-AVX512-NEXT: retq
%t = call <16 x float> @llvm.copysign.v16f32(<16 x float> %a0, <16 x float> %a1)
ret <16 x float> %t
Expand Down Expand Up @@ -697,7 +697,7 @@ define <32 x half> @fcopysign_v32f16(ptr %p0, ptr %p1) nounwind {
; X86-AVX512-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-AVX512-NEXT: vmovdqu64 (%ecx), %zmm1
; X86-AVX512-NEXT: vpbroadcastd {{.*#+}} zmm0 = [2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879]
; X86-AVX512-NEXT: vpternlogd $202, (%eax), %zmm1, %zmm0
; X86-AVX512-NEXT: vpternlogd {{.*#+}} zmm0 = mem ^ (zmm0 & (zmm1 ^ mem))
; X86-AVX512-NEXT: retl
;
; X64-SSE-LABEL: fcopysign_v32f16:
Expand Down Expand Up @@ -750,7 +750,7 @@ define <32 x half> @fcopysign_v32f16(ptr %p0, ptr %p1) nounwind {
; X64-AVX512: # %bb.0:
; X64-AVX512-NEXT: vmovdqu64 (%rdi), %zmm1
; X64-AVX512-NEXT: vpbroadcastd {{.*#+}} zmm0 = [2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879,2147450879]
; X64-AVX512-NEXT: vpternlogd $202, (%rsi), %zmm1, %zmm0
; X64-AVX512-NEXT: vpternlogd {{.*#+}} zmm0 = mem ^ (zmm0 & (zmm1 ^ mem))
; X64-AVX512-NEXT: retq
%a0 = load <32 x half>, ptr %p0, align 16
%a1 = load <32 x half>, ptr %p1, align 16
Expand Down
Loading