[PowerPC] Use MCRegister instead of unsigned. NFC#167602
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I'm considering a operator>(MCRegister, unsigned) and operator<(MCRegister, unsigned) so I have not updated those lines. Such comparisons are common on MCRegister.
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@llvm/pr-subscribers-backend-powerpc Author: Craig Topper (topperc) ChangesI'm considering a operator>(MCRegister, unsigned) and operator<(MCRegister, unsigned) so I have not updated those lines. Such comparisons are common on MCRegister. Full diff: https://github.com/llvm/llvm-project/pull/167602.diff 3 Files Affected:
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
index b27bc3bd49315..a2f981e861511 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
@@ -619,11 +619,11 @@ bool PPCInstPrinter::showRegistersWithPercentPrefix(const char *RegName) const {
/// getVerboseConditionalRegName - This method expands the condition register
/// when requested explicitly or targetting Darwin.
const char *
-PPCInstPrinter::getVerboseConditionRegName(unsigned RegNum,
+PPCInstPrinter::getVerboseConditionRegName(MCRegister Reg,
unsigned RegEncoding) const {
if (!FullRegNames && !MAI.useFullRegisterNames())
return nullptr;
- if (RegNum < PPC::CR0EQ || RegNum > PPC::CR7UN)
+ if (Reg < PPC::CR0EQ || Reg > PPC::CR7UN)
return nullptr;
const char *CRBits[] = {
"lt", "gt", "eq", "un",
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
index 48f66ca26958e..01ff6255f2a03 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
@@ -23,7 +23,7 @@ class PPCInstPrinter : public MCInstPrinter {
private:
bool showRegistersWithPercentPrefix(const char *RegName) const;
bool showRegistersWithPrefix() const;
- const char *getVerboseConditionRegName(unsigned RegNum,
+ const char *getVerboseConditionRegName(MCRegister Reg,
unsigned RegEncoding) const;
public:
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
index a088096c92a68..db37fbf395096 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
@@ -287,11 +287,11 @@ using llvm::MCPhysReg;
namespace llvm {
namespace PPC {
-static inline bool isVFRegister(unsigned Reg) {
+static inline bool isVFRegister(MCRegister Reg) {
return Reg >= PPC::VF0 && Reg <= PPC::VF31;
}
-static inline bool isVRRegister(unsigned Reg) {
+static inline bool isVRRegister(MCRegister Reg) {
return Reg >= PPC::V0 && Reg <= PPC::V31;
}
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/138/builds/21691 Here is the relevant piece of the build log for the reference |
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/116/builds/20878 Here is the relevant piece of the build log for the reference |
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I'm considering a operator>(MCRegister, unsigned) and operator<(MCRegister, unsigned) so I have not updated those lines. Such comparisons are common on MCRegister.