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SelectionDAG: Improve expandFMINIMUM_FMAXIMUM #137367

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924946c
expandFMINIMUM_FMAXIMUM: FMAXNUM/FMINNUM treat +0>-0
wzssyqa Apr 25, 2025
a0a2c79
Fix testcase
wzssyqa Apr 26, 2025
9018fb9
Update nvptx tests
wzssyqa Dec 4, 2025
55b8dd4
Merge branch 'main' into expandFMINIMUM_NO_IEEE
wzssyqa Dec 5, 2025
be9afea
Merge branch 'main' into expandFMINIMUM_NO_IEEE
wzssyqa Dec 8, 2025
3cd47fa
Merge branch 'main' into expandFMINIMUM_NO_IEEE
wzssyqa Dec 9, 2025
fe36e4f
Improve expandFMINIMUM_FMAXIMUM
wzssyqa Dec 9, 2025
db19f15
Unroll for vector without vselect: v1f64 need it
wzssyqa Dec 9, 2025
b62e0d6
Update amdgcn testcase
wzssyqa Dec 9, 2025
2a94376
Use constant nan instead cmp and select
wzssyqa Dec 16, 2025
934bc12
Merge branch 'main' into expandFMINIMUM_NO_IEEE
wzssyqa Dec 16, 2025
f3ac660
Remove changes of amdgpu test
wzssyqa Dec 16, 2025
b257a8e
remove isOperationCustom(ISD::FMAXNUM or ISD::FMINNUM)
wzssyqa Dec 17, 2025
c49f60e
Merge branch 'main' into expandFMINIMUM_NO_IEEE
wzssyqa Dec 17, 2025
bd2d568
remove isOperationLegal(ISD::FMAXNUM or ISD::FMINNUM)
wzssyqa Dec 19, 2025
ccb8e22
return as early as possible if we have MinMaxOpc
wzssyqa Dec 23, 2025
07b9d5b
Merge branch 'main' into expandFMINIMUM_NO_IEEE
wzssyqa Dec 23, 2025
6ee3108
Improve todo wording
wzssyqa Dec 23, 2025
c0d7196
add missing ;
wzssyqa Dec 23, 2025
d1a4ce3
Use isOperationLegalOrCustom
wzssyqa Dec 24, 2025
8b9674b
Merge branch 'main' into expandFMINIMUM_NO_IEEE
wzssyqa Feb 9, 2026
9040416
remove unneeded comment
wzssyqa Feb 9, 2026
8c79e75
Some fixes
wzssyqa Feb 9, 2026
33fd8c5
update x86 tests and remove DAG.UnrollVectorOp
wzssyqa Feb 9, 2026
b84a948
Add DAG.UnrollVectorOp back
wzssyqa Feb 9, 2026
1dc6835
Not use getSelectCC
wzssyqa Feb 9, 2026
86361e3
Merge branch 'main' into expandFMINIMUM_NO_IEEE
wzssyqa Feb 9, 2026
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3 changes: 1 addition & 2 deletions llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -8749,15 +8749,14 @@ SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
unsigned CompOpcIeee = IsMax ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
unsigned CompOpc = IsMax ? ISD::FMAXNUM : ISD::FMINNUM;

// FIXME: We should probably define fminnum/fmaxnum variants with correct
// signed zero behavior.
bool MinMaxMustRespectOrderedZero = false;

if (isOperationLegalOrCustom(CompOpcIeee, VT)) {
MinMax = DAG.getNode(CompOpcIeee, DL, VT, LHS, RHS, Flags);
MinMaxMustRespectOrderedZero = true;
} else if (isOperationLegalOrCustom(CompOpc, VT)) {
MinMax = DAG.getNode(CompOpc, DL, VT, LHS, RHS, Flags);
MinMaxMustRespectOrderedZero = true;
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} else {
if (VT.isVector() && !isOperationLegalOrCustom(ISD::VSELECT, VT))
return DAG.UnrollVectorOp(N);
Expand Down
108 changes: 30 additions & 78 deletions llvm/test/CodeGen/NVPTX/math-intrins.ll
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Expand Up @@ -681,22 +681,16 @@ define half @minimum_half(half %a, half %b) {
define float @minimum_float(float %a, float %b) {
; CHECK-NOF16-LABEL: minimum_float(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<5>;
; CHECK-NOF16-NEXT: .reg .b32 %r<8>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %r<5>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [minimum_float_param_0];
; CHECK-NOF16-NEXT: ld.param.b32 %r2, [minimum_float_param_1];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r2;
; CHECK-NOF16-NEXT: min.f32 %r3, %r1, %r2;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f7FC00000, %r3, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r1, %r4, %p2;
; CHECK-NOF16-NEXT: setp.eq.b32 %p3, %r2, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r6, %r2, %r5, %p3;
; CHECK-NOF16-NEXT: setp.eq.f32 %p4, %r4, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r7, %r6, %r4, %p4;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r7;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r4;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: minimum_float(
Expand Down Expand Up @@ -727,19 +721,15 @@ define float @minimum_float(float %a, float %b) {
define float @minimum_imm1(float %a) {
; CHECK-NOF16-LABEL: minimum_imm1(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<4>;
; CHECK-NOF16-NEXT: .reg .b32 %r<6>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %r<4>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [minimum_imm1_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r1;
; CHECK-NOF16-NEXT: min.f32 %r2, %r1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r3, 0f7FC00000, %r2, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r4, %r1, %r3, %p2;
; CHECK-NOF16-NEXT: setp.eq.f32 %p3, %r3, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r4, %r3, %p3;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r5;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r3;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: minimum_imm1(
Expand Down Expand Up @@ -768,19 +758,15 @@ define float @minimum_imm1(float %a) {
define float @minimum_imm2(float %a) {
; CHECK-NOF16-LABEL: minimum_imm2(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<4>;
; CHECK-NOF16-NEXT: .reg .b32 %r<6>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %r<4>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [minimum_imm2_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r1;
; CHECK-NOF16-NEXT: min.f32 %r2, %r1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r3, 0f7FC00000, %r2, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r4, %r1, %r3, %p2;
; CHECK-NOF16-NEXT: setp.eq.f32 %p3, %r3, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r4, %r3, %p3;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r5;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r3;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: minimum_imm2(
Expand Down Expand Up @@ -809,22 +795,16 @@ define float @minimum_imm2(float %a) {
define float @minimum_float_ftz(float %a, float %b) #1 {
; CHECK-NOF16-LABEL: minimum_float_ftz(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<5>;
; CHECK-NOF16-NEXT: .reg .b32 %r<8>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %r<5>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [minimum_float_ftz_param_0];
; CHECK-NOF16-NEXT: ld.param.b32 %r2, [minimum_float_ftz_param_1];
; CHECK-NOF16-NEXT: setp.nan.ftz.f32 %p1, %r1, %r2;
; CHECK-NOF16-NEXT: min.ftz.f32 %r3, %r1, %r2;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f7FC00000, %r3, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r1, %r4, %p2;
; CHECK-NOF16-NEXT: setp.eq.b32 %p3, %r2, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r6, %r2, %r5, %p3;
; CHECK-NOF16-NEXT: setp.eq.ftz.f32 %p4, %r4, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r7, %r6, %r4, %p4;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r7;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r4;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: minimum_float_ftz(
Expand Down Expand Up @@ -855,22 +835,16 @@ define float @minimum_float_ftz(float %a, float %b) #1 {
define double @minimum_double(double %a, double %b) {
; CHECK-LABEL: minimum_double(
; CHECK: {
; CHECK-NEXT: .reg .pred %p<5>;
; CHECK-NEXT: .reg .b64 %rd<8>;
; CHECK-NEXT: .reg .pred %p<2>;
; CHECK-NEXT: .reg .b64 %rd<5>;
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [minimum_double_param_0];
; CHECK-NEXT: ld.param.b64 %rd2, [minimum_double_param_1];
; CHECK-NEXT: setp.nan.f64 %p1, %rd1, %rd2;
; CHECK-NEXT: min.f64 %rd3, %rd1, %rd2;
; CHECK-NEXT: selp.f64 %rd4, 0d7FF8000000000000, %rd3, %p1;
; CHECK-NEXT: setp.eq.b64 %p2, %rd1, -9223372036854775808;
; CHECK-NEXT: selp.f64 %rd5, %rd1, %rd4, %p2;
; CHECK-NEXT: setp.eq.b64 %p3, %rd2, -9223372036854775808;
; CHECK-NEXT: selp.f64 %rd6, %rd2, %rd5, %p3;
; CHECK-NEXT: setp.eq.f64 %p4, %rd4, 0d0000000000000000;
; CHECK-NEXT: selp.f64 %rd7, %rd6, %rd4, %p4;
; CHECK-NEXT: st.param.b64 [func_retval0], %rd7;
; CHECK-NEXT: st.param.b64 [func_retval0], %rd4;
; CHECK-NEXT: ret;
%x = call double @llvm.minimum.f64(double %a, double %b)
ret double %x
Expand Down Expand Up @@ -1212,17 +1186,15 @@ define half @maximum_half(half %a, half %b) {
define float @maximum_imm1(float %a) {
; CHECK-NOF16-LABEL: maximum_imm1(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<3>;
; CHECK-NOF16-NEXT: .reg .b32 %r<5>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %r<4>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [maximum_imm1_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r1;
; CHECK-NOF16-NEXT: max.f32 %r2, %r1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r3, 0f7FC00000, %r2, %p1;
; CHECK-NOF16-NEXT: setp.eq.f32 %p2, %r3, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f00000000, %r3, %p2;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r4;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r3;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: maximum_imm1(
Expand Down Expand Up @@ -1251,17 +1223,15 @@ define float @maximum_imm1(float %a) {
define float @maximum_imm2(float %a) {
; CHECK-NOF16-LABEL: maximum_imm2(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<3>;
; CHECK-NOF16-NEXT: .reg .b32 %r<5>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %r<4>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [maximum_imm2_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r1;
; CHECK-NOF16-NEXT: max.f32 %r2, %r1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r3, 0f7FC00000, %r2, %p1;
; CHECK-NOF16-NEXT: setp.eq.f32 %p2, %r3, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f00000000, %r3, %p2;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r4;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r3;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: maximum_imm2(
Expand Down Expand Up @@ -1290,22 +1260,16 @@ define float @maximum_imm2(float %a) {
define float @maximum_float(float %a, float %b) {
; CHECK-NOF16-LABEL: maximum_float(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<5>;
; CHECK-NOF16-NEXT: .reg .b32 %r<8>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %r<5>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [maximum_float_param_0];
; CHECK-NOF16-NEXT: ld.param.b32 %r2, [maximum_float_param_1];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r2;
; CHECK-NOF16-NEXT: max.f32 %r3, %r1, %r2;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f7FC00000, %r3, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, 0;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r1, %r4, %p2;
; CHECK-NOF16-NEXT: setp.eq.b32 %p3, %r2, 0;
; CHECK-NOF16-NEXT: selp.f32 %r6, %r2, %r5, %p3;
; CHECK-NOF16-NEXT: setp.eq.f32 %p4, %r4, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r7, %r6, %r4, %p4;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r7;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r4;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: maximum_float(
Expand Down Expand Up @@ -1336,22 +1300,16 @@ define float @maximum_float(float %a, float %b) {
define float @maximum_float_ftz(float %a, float %b) #1 {
; CHECK-NOF16-LABEL: maximum_float_ftz(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<5>;
; CHECK-NOF16-NEXT: .reg .b32 %r<8>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %r<5>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [maximum_float_ftz_param_0];
; CHECK-NOF16-NEXT: ld.param.b32 %r2, [maximum_float_ftz_param_1];
; CHECK-NOF16-NEXT: setp.nan.ftz.f32 %p1, %r1, %r2;
; CHECK-NOF16-NEXT: max.ftz.f32 %r3, %r1, %r2;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f7FC00000, %r3, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, 0;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r1, %r4, %p2;
; CHECK-NOF16-NEXT: setp.eq.b32 %p3, %r2, 0;
; CHECK-NOF16-NEXT: selp.f32 %r6, %r2, %r5, %p3;
; CHECK-NOF16-NEXT: setp.eq.ftz.f32 %p4, %r4, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r7, %r6, %r4, %p4;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r7;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r4;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: maximum_float_ftz(
Expand Down Expand Up @@ -1382,22 +1340,16 @@ define float @maximum_float_ftz(float %a, float %b) #1 {
define double @maximum_double(double %a, double %b) {
; CHECK-LABEL: maximum_double(
; CHECK: {
; CHECK-NEXT: .reg .pred %p<5>;
; CHECK-NEXT: .reg .b64 %rd<8>;
; CHECK-NEXT: .reg .pred %p<2>;
; CHECK-NEXT: .reg .b64 %rd<5>;
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [maximum_double_param_0];
; CHECK-NEXT: ld.param.b64 %rd2, [maximum_double_param_1];
; CHECK-NEXT: setp.nan.f64 %p1, %rd1, %rd2;
; CHECK-NEXT: max.f64 %rd3, %rd1, %rd2;
; CHECK-NEXT: selp.f64 %rd4, 0d7FF8000000000000, %rd3, %p1;
; CHECK-NEXT: setp.eq.b64 %p2, %rd1, 0;
; CHECK-NEXT: selp.f64 %rd5, %rd1, %rd4, %p2;
; CHECK-NEXT: setp.eq.b64 %p3, %rd2, 0;
; CHECK-NEXT: selp.f64 %rd6, %rd2, %rd5, %p3;
; CHECK-NEXT: setp.eq.f64 %p4, %rd4, 0d0000000000000000;
; CHECK-NEXT: selp.f64 %rd7, %rd6, %rd4, %p4;
; CHECK-NEXT: st.param.b64 [func_retval0], %rd7;
; CHECK-NEXT: st.param.b64 [func_retval0], %rd4;
; CHECK-NEXT: ret;
%x = call double @llvm.maximum.f64(double %a, double %b)
ret double %x
Expand Down
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