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sycl: set fattn_vec_nthreads to 256 for Battlemage - #25205

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Titaniumtown:pr/sycl_fattn_vec_nthreads
Jul 14, 2026
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sycl: set fattn_vec_nthreads to 256 for Battlemage#25205
ggerganov merged 1 commit into
ggml-org:masterfrom
Titaniumtown:pr/sycl_fattn_vec_nthreads

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Overview

Adds a GGML_SYCL_FATTN_VEC_NTHREADS option which sets the VEC_NTHREADS option. This is useful when the hardware supports values different than 128.

Additional information

For 1st gen Intel ARC Graphics, 128 is the native option. For 2nd gen Arc Graphics, 256 is what the hardware supports.

Requirements

@Titaniumtown
Titaniumtown requested a review from a team as a code owner July 1, 2026 15:51
@github-actions github-actions Bot added ggml changes relating to the ggml tensor library for machine learning SYCL https://en.wikipedia.org/wiki/SYCL - GPU programming language labels Jul 1, 2026

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The idea to set different value for hardware is good.
But the method of hard code is not good.
In base code, there is framework to check the hardware type and set the parameter value in initial stage.
Is it possible to refactor the code by referring them?

code to check the hardware type:

In ggml-sycl.cpp

if (!(ggml_sycl_info().devices[ctx.device].hw_info.arch ==
                gpu_arch::intel_gpu_acm_g10 &&
            src0->type == GGML_TYPE_Q4_0)) {
        use_dequantize_mul_mat_vec =
            use_dequantize_mul_mat_vec && !use_mul_mat_vec_q;
      }

Check the hardware and set parameter in initial stage:

In ggml-sycl.cpp

info.devices[i].max_wg_per_cu = info.max_work_group_sizes[i] / prop.get_max_compute_units();
        info.devices[i].hw_info = get_device_hw_info(&device);

In this case, you could add info.devices[i].xxx = 128 for xe, 256 for xe2.
In the code, call info.devices[i].xxx to get the right value.

Thank you!

@arthw

arthw commented Jul 4, 2026

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@Titaniumtown
Could you check the review comments?

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Yup! I will get on it, sorry, life has been busy.

@Titaniumtown
Titaniumtown force-pushed the pr/sycl_fattn_vec_nthreads branch from 4d913bd to dfae4d0 Compare July 5, 2026 02:19
Comment thread ggml/src/ggml-sycl/ggml-sycl.cpp Outdated
@Titaniumtown
Titaniumtown force-pushed the pr/sycl_fattn_vec_nthreads branch from dfae4d0 to d368c0a Compare July 7, 2026 22:02
Comment thread ggml/src/ggml-sycl/fattn-vec.hpp Outdated
@Titaniumtown
Titaniumtown force-pushed the pr/sycl_fattn_vec_nthreads branch from d368c0a to 9315ed0 Compare July 8, 2026 15:17
Comment thread ggml/src/ggml-sycl/fattn-vec.hpp Outdated
@Titaniumtown
Titaniumtown force-pushed the pr/sycl_fattn_vec_nthreads branch from 9315ed0 to 8a198f1 Compare July 9, 2026 04:12

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It's good job!

Thank you!

@arthw arthw added the merge ready A maintainer can use this label to indicate that they consider the changes final and ready to merge. label Jul 10, 2026
Comment thread ggml/src/ggml-sycl/common.hpp Outdated
Currently detects lunarlake + battlemage / xe2 and
sets the value to 256.

Keeps default at 128, Intel's ARC Alchemist's prefered value.
@Titaniumtown
Titaniumtown force-pushed the pr/sycl_fattn_vec_nthreads branch from 8a198f1 to add3f78 Compare July 13, 2026 22:04
@ggerganov
ggerganov merged commit c1063ac into ggml-org:master Jul 14, 2026
25 of 28 checks passed
@Titaniumtown Titaniumtown changed the title sycl: add GGML_SYCL_FATTN_VEC_NTHREADS build option sycl: set fattn_vec_nthreads to 256 for Battlemage Jul 18, 2026
Titaniumtown added a commit to Titaniumtown/llama.cpp that referenced this pull request Jul 18, 2026
Launch geometry only: the non-contiguous concat kernel launched a single-lane
work-group (1, 1, 1), now it will launch a (1, 1, SYCL_CONCAT_BLOCK_SIZE) one.

SYCL_CONCAT_BLOCK_SIZE is defined in `ggml/src/ggml-sycl/presets.hpp`.

Potential future improvement is using a similar dynamic value discovery to:
ggml-org#25205

llama-bench (Arc Pro B70, Qwen3.6-27B-UD-Q4_K_XL, -fa on, q8_0 KV),
on top of upstream master: pp2048 920 -> 1006 t/s (+9.4%)
CowboyTim pushed a commit to aardbeiplantje/llama.cpp that referenced this pull request Jul 21, 2026
Currently detects lunarlake + battlemage / xe2 and
sets the value to 256.

Keeps default at 128, Intel's ARC Alchemist's prefered value.
RehanQasim-dev pushed a commit to aifoundry-org/llama.cpp that referenced this pull request Jul 23, 2026
Currently detects lunarlake + battlemage / xe2 and
sets the value to 256.

Keeps default at 128, Intel's ARC Alchemist's prefered value.
RehanQasim-dev pushed a commit to aifoundry-org/llama.cpp that referenced this pull request Jul 23, 2026
Currently detects lunarlake + battlemage / xe2 and
sets the value to 256.

Keeps default at 128, Intel's ARC Alchemist's prefered value.
@arthw

arthw commented Aug 1, 2026

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@Titaniumtown
This PR make some LLM error on non-BMG.
Like llama-2-7b.Q4_0.gguf on Arc770:

./examples/sycl/test.sh -m ../models/llama-2-7b.Q4_0.gguf

...
Exception caught at file:/hd1/jianyuzh/llama.cpp/arthw/ggml/src/ggml-sycl/ggml-sycl.cpp, line:5236
Error OP FLASH_ATTN_EXT

Could you check it?
And I will check it too.

Thank you!

@Titaniumtown

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@arthw has someone opened an issue for that? I don't have any Alchemist hardware to test with.

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arthw commented Aug 2, 2026

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No, I found it.
OK, I will check it.
Hope fix it as soon!

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arthw commented Aug 2, 2026

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@Titaniumtown
I fixed it by #26441.

smalinin pushed a commit to smalinin/llama.cpp that referenced this pull request Aug 4, 2026
Currently detects lunarlake + battlemage / xe2 and
sets the value to 256.

Keeps default at 128, Intel's ARC Alchemist's prefered value.
satindergrewal pushed a commit to satindergrewal/llama.cpp that referenced this pull request Aug 12, 2026
Currently detects lunarlake + battlemage / xe2 and
sets the value to 256.

Keeps default at 128, Intel's ARC Alchemist's prefered value.
mndodd added a commit to mndodd/llama.cpp that referenced this pull request Aug 12, 2026
100 commits, 8 SYCL. Conflicts in 6 files, 10 hunks. 7 union-merged
(independent globals/switch-cases: our reorder_in_gemm + NVFP4 alongside
their fa_onednn + Q2_K ggml-org#25064). 3 needed a call:

- fattn.cpp: keep our env-gated MMA override FIRST, then upstream's oneDNN
  SDPA prefill FA (ggml-org#25222), then our decode VEC/TILE doors. Our decode +
  quantized-KV path stays ours; oneDNN takes prefill-shaped only.
  WARN: ggml-org#25222 has the RIG-HYGIENE ggml-org#26 pool_alloc use-after-free -- needs
  multi-turn 2-GPU garbage-token validation before trust.
- fattn-vec.hpp: take upstream ggml-org#25205 Battlemage nthreads=256, preserve our
  is_vec_kernel=true arg (selects nsm geometry in launch_fattn).
- dequantize.hpp q2_K: keep our f32-arithmetic dequant (NMSE 2.5e-7).

test-backend-ops.cpp: v=4 was overloaded -- upstream ggml-org#25064 uses it for
non-cont-a-last-2-dim, ours for transposed-b. Moved our transposed-b to
bit 1<<4 so both coverages survive.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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4 participants