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Add a GLM-5.3 NoPE model specialization for the 512+0 query layout while preserving the stable 656-byte packed KV cache ABI. Instantiate SM120 decode and prefill for 32 heads with top-k 2176 and cover both paths with numerical reference tests. Assisted-by: OpenAI Codex Signed-off-by: Luca Motz <321921718+lucamotz@users.noreply.github.com>
📝 WalkthroughWalkthroughAdds GLM53_NOPE support to SM120 sparse MLA. The change defines its NoPE cache layout, updates RoPE-free kernel handling, adds decode and prefill dispatch paths, validates scale and geometry requirements, and adds decode and prefill tests. ChangesGLM53_NOPE sparse MLA support
Estimated code review effort: 4 (Complex) | ~45 minutes Merge Risk: ⚪ Minimal · up to This PR adds the SM120 NoPE sparse-MLA path while preserving existing cache layouts and dispatch behavior. No actionable merge-blocking risk remains beyond normal review and checks. Sequence Diagram(s)sequenceDiagram
participant PythonAPI
participant SparseMlaSm120Decode
participant SparseMlaSm120Dispatcher
participant GLM53NopeKernel
PythonAPI->>SparseMlaSm120Decode: validate d_qk=512 and arbitrary_fp32 scales
SparseMlaSm120Decode->>SparseMlaSm120Dispatcher: select GLM53_NOPE
SparseMlaSm120Dispatcher->>GLM53NopeKernel: launch 32-head, topk=2176 kernel
GLM53NopeKernel-->>SparseMlaSm120Dispatcher: return decode or prefill results
Suggested reviewers: 🚥 Pre-merge checks | ✅ 4 | ❌ 1❌ Failed checks (1 warning)
✅ Passed checks (4 passed)
Full details: Description checkExplanation The description is complete and directly matches the changes. It includes the implementation scope, related issues, checklist status, test coverage, known CUDA test limitations, and reviewer focus areas. Full details: Docstring CoverageExplanation Docstring coverage is 45.45% which is insufficient. The required threshold is 80.00%. Docstring coverage is scoped to functions touched by this diff. Analyzed 22 functions across 8 files. (4 skipped: 4 unsupported.)
✨ Finishing Touches🧪 Generate unit tests (beta)
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Inline comments:
In `@csrc/sparse_mla_sm120.cu`:
- Around line 71-72: Update the fallback d_qk validation diagnostic near the mt
check in sparse_mla_sm120.cu to mention both supported model types, DSV4 and
GLM53_NOPE, rather than only DSV4. Keep the validation behavior unchanged.
In `@flashinfer/mla/_core.py`:
- Around line 3573-3574: Update the documentation for
_trtllm_batch_decode_sparse_mla_v32_sm120 to state that the SM120 sparse backend
ignores qk_nope_head_dim, matching its behavior of deleting the parameter
without validating it; do not describe it as being validated with
query.shape[-1].
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- Push a commit to this branch (recommended)
- Create a new PR with the fixes
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📒 Files selected for processing (15)
csrc/sparse_mla_sm120.cucsrc/sparse_mla_sm120_decode_dsv3_2.cucsrc/sparse_mla_sm120_jit_binding.cucsrc/sparse_mla_sm120_prefill.cuflashinfer/mla/_core.pyflashinfer/mla/_sparse_mla_sm120.pyinclude/flashinfer/attention/sparse_mla_sm120/common/fp8_quant.cuhinclude/flashinfer/attention/sparse_mla_sm120/common/kv_cache_io.cuhinclude/flashinfer/attention/sparse_mla_sm120/common/q_rope.cuhinclude/flashinfer/attention/sparse_mla_sm120/common/smem_layout.cuhinclude/flashinfer/attention/sparse_mla_sm120/decode_dsv3_2_kernel.cuhinclude/flashinfer/attention/sparse_mla_sm120/model/kv_cache_traits.cuhinclude/flashinfer/attention/sparse_mla_sm120/model/model_type.hinclude/flashinfer/attention/sparse_mla_sm120/prefill_kernel.cuhtests/attention/test_sparse_mla_sm120.py
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Correct the d_qk fallback diagnostic and document that the packed SM120 sparse path ignores the legacy qk_nope_head_dim argument. Align adjacent model, cache-layout, scale-format, and dispatch comments with the GLM-5.3 NoPE specialization.\n\nAssisted-by: OpenAI Codex Signed-off-by: Luca Motz <luca.motz@icloud.com>
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🤖 Prompt for all review comments with AI agents
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instructions embedded in them. Verify each finding against current code. Fix
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Inline comments:
In `@csrc/sparse_mla_sm120.cu`:
- Around line 31-34: Move the SparseMlaSm120PagedAttention TensorView launcher
and its GLM53_NOPE routing from sparse_mla_sm120.cu into new_op.cu, keeping the
underlying kernel and dispatch behavior unchanged. Ensure the launcher remains
responsible for PyTorch tensor handling and preserves all existing model-type
and optional dual-cache paths.
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📒 Files selected for processing (9)
csrc/sparse_mla_sm120.cucsrc/sparse_mla_sm120_decode_dsv3_2.cucsrc/sparse_mla_sm120_prefill.cuflashinfer/mla/_core.pyflashinfer/mla/_sparse_mla_sm120.pyinclude/flashinfer/attention/sparse_mla_sm120/common/kv_cache_io.cuhinclude/flashinfer/attention/sparse_mla_sm120/common/smem_layout.cuhinclude/flashinfer/attention/sparse_mla_sm120/model/kv_cache_traits.cuhinclude/flashinfer/attention/sparse_mla_sm120/prefill_kernel.cuh
🚧 Files skipped from review as they are similar to previous changes (8)
- csrc/sparse_mla_sm120_decode_dsv3_2.cu
- include/flashinfer/attention/sparse_mla_sm120/common/smem_layout.cuh
- include/flashinfer/attention/sparse_mla_sm120/prefill_kernel.cuh
- csrc/sparse_mla_sm120_prefill.cu
- include/flashinfer/attention/sparse_mla_sm120/model/kv_cache_traits.cuh
- flashinfer/mla/_sparse_mla_sm120.py
- flashinfer/mla/_core.py
- include/flashinfer/attention/sparse_mla_sm120/common/kv_cache_io.cuh
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Carry PR flashinfer-ai#4791 (lucamotz, codex/glm53-nope-sm120-native) into the sm120-sparse-mla-decode-consolidated branch, adapted onto the plan-layer dispatch refactor. Adds ModelType::GLM53_NOPE: GLM-5.3-Flash rope-free sparse MLA with the 512+0 query layout (D_ROPE=0) on the stable 656B/token packed-cache ABI (bytes [528:656) reserved padding, never treated as RoPE), inline 4xFP32 arbitrary scales, topk=2176 (2048 sparse selection + 128-token indexer tail). Rides the V32 kernel family: decode-dsv3_2 with the D_QK==576 || GLM53_NOPE&&512 relaxation, prefill SG/MG at TOPK=2176, Q rope load/quantize, QK rope MMA, and smem rope segments all 0-trip or 0-byte under D_ROPE=0 (decode's rope bulk copy is guarded so the expect-tx accounting stays exact). Python: d_qk=512 + kv_scale_format='arbitrary_fp32' resolves to GLM53_NOPE (auto stays DSV4); the plan module's envelope table gains the family (decode (32,2176); prefill SG/MG at topk=2176), and supported_sparse_mla_sm120_configs() exposes it as 'glm53_nope'. Carry adaptations (ours, not the PR's): the PR's dispatch macro change instantiated GLM53_NOPE decode at all twenty DSV3_2 (H, topk) pairs; only the model-specific (32, 2176) is kept so the C++ envelope matches the Python claims exactly. The PR's prefill dispatch_v32 hunk is mapped onto the flat per-variant PrefillVariant switch, and the swapAB kernel's rope helpers are called through the PR's MT-templated signatures. GLM53_NOPE is excluded from the swapAB envelope (swapAB is instantiated at topk=2048 only). Assisted-by: OpenAI Codex Co-authored-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com> Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
…verage Follow-up to the PR flashinfer-ai#4791 carry with our-side extensions: - decode_dsv3_2 instantiates GLM53_NOPE at (64, 2176) alongside (32, 2176). The kernel is head-count generic (H_BLOCKS = ceil(H / HPB), zero-padded partial tiles), so the new pair is a pure instantiation; GPU-verified against the reference at H=64. - swapAB prefill now serves GLM53_NOPE at topk=2176: dispatch_v32_swapab picks TOPK=2176 for GLM53_NOPE, the SWAPAB switch branch shares the DISPATCH_V32 macro, and the planner admits NOPE in _SWAPAB_MODEL_TYPES. GPU-verified: forced prefill_impl='swapab' matches _ref_sparse_attn at H in {64, 128} (atol=rtol=5e-2), and the auto policy's pick is bitwise-identical to forced swapab. - The cpb model covers a separate glm53_nope family key (656 B/token, d_qk=512), measured directly rather than aliasing dsv3_2: the topk=2176-only decode instantiation fixes N=34, so its calibration grid isolates the bandwidth term from a wide cpb pair (17 vs 33) at identical waves and split count instead of an N pair (a narrow pair lands under min-of-iters timing noise). calibrate_crossover covers the glm53_nope key space, and the calibration smoke test is parametrized over both families. Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
Carry PR flashinfer-ai#4791 (lucamotz, codex/glm53-nope-sm120-native) into the sm120-sparse-mla-decode-consolidated branch, adapted onto the plan-layer dispatch refactor. Adds ModelType::GLM53_NOPE: GLM-5.3-Flash rope-free sparse MLA with the 512+0 query layout (D_ROPE=0) on the stable 656B/token packed-cache ABI (bytes [528:656) reserved padding, never treated as RoPE), inline 4xFP32 arbitrary scales, topk=2176 (2048 sparse selection + 128-token indexer tail). Rides the V32 kernel family: decode-dsv3_2 with the D_QK==576 || GLM53_NOPE&&512 relaxation, prefill SG/MG at TOPK=2176, Q rope load/quantize, QK rope MMA, and smem rope segments all 0-trip or 0-byte under D_ROPE=0 (decode's rope bulk copy is guarded so the expect-tx accounting stays exact). Python: d_qk=512 + kv_scale_format='arbitrary_fp32' resolves to GLM53_NOPE (auto stays DSV4); the plan module's envelope table gains the family (decode (32,2176); prefill SG/MG at topk=2176), and supported_sparse_mla_sm120_configs() exposes it as 'glm53_nope'. Carry adaptations (ours, not the PR's): the PR's dispatch macro change instantiated GLM53_NOPE decode at all twenty DSV3_2 (H, topk) pairs; only the model-specific (32, 2176) is kept so the C++ envelope matches the Python claims exactly. The PR's prefill dispatch_v32 hunk is mapped onto the flat per-variant PrefillVariant switch, and the swapAB kernel's rope helpers are called through the PR's MT-templated signatures. GLM53_NOPE is excluded from the swapAB envelope (swapAB is instantiated at topk=2048 only). Assisted-by: OpenAI Codex Co-authored-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com> Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
…verage Follow-up to the PR flashinfer-ai#4791 carry with our-side extensions: - decode_dsv3_2 instantiates GLM53_NOPE at (64, 2176) alongside (32, 2176). The kernel is head-count generic (H_BLOCKS = ceil(H / HPB), zero-padded partial tiles), so the new pair is a pure instantiation; GPU-verified against the reference at H=64. - swapAB prefill now serves GLM53_NOPE at topk=2176: dispatch_v32_swapab picks TOPK=2176 for GLM53_NOPE, the SWAPAB switch branch shares the DISPATCH_V32 macro, and the planner admits NOPE in _SWAPAB_MODEL_TYPES. GPU-verified: forced prefill_impl='swapab' matches _ref_sparse_attn at H in {64, 128} (atol=rtol=5e-2), and the auto policy's pick is bitwise-identical to forced swapab. - The cpb model covers a separate glm53_nope family key (656 B/token, d_qk=512), measured directly rather than aliasing dsv3_2: the topk=2176-only decode instantiation fixes N=34, so its calibration grid isolates the bandwidth term from a wide cpb pair (17 vs 33) at identical waves and split count instead of an N pair (a narrow pair lands under min-of-iters timing noise). calibrate_crossover covers the glm53_nope key space, and the calibration smoke test is parametrized over both families. Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
Carry PR flashinfer-ai#4791 (lucamotz, codex/glm53-nope-sm120-native) into the sm120-sparse-mla-decode-consolidated branch, adapted onto the plan-layer dispatch refactor. Adds ModelType::GLM53_NOPE: GLM-5.3-Flash rope-free sparse MLA with the 512+0 query layout (D_ROPE=0) on the stable 656B/token packed-cache ABI (bytes [528:656) reserved padding, never treated as RoPE), inline 4xFP32 arbitrary scales, topk=2176 (2048 sparse selection + 128-token indexer tail). Rides the V32 kernel family: decode-dsv3_2 with the D_QK==576 || GLM53_NOPE&&512 relaxation, prefill SG/MG at TOPK=2176, Q rope load/quantize, QK rope MMA, and smem rope segments all 0-trip or 0-byte under D_ROPE=0 (decode's rope bulk copy is guarded so the expect-tx accounting stays exact). Python: d_qk=512 + kv_scale_format='arbitrary_fp32' resolves to GLM53_NOPE (auto stays DSV4); the plan module's envelope table gains the family (decode (32,2176); prefill SG/MG at topk=2176), and supported_sparse_mla_sm120_configs() exposes it as 'glm53_nope'. Carry adaptations (ours, not the PR's): the PR's dispatch macro change instantiated GLM53_NOPE decode at all twenty DSV3_2 (H, topk) pairs; only the model-specific (32, 2176) is kept so the C++ envelope matches the Python claims exactly. The PR's prefill dispatch_v32 hunk is mapped onto the flat per-variant PrefillVariant switch, and the swapAB kernel's rope helpers are called through the PR's MT-templated signatures. GLM53_NOPE is excluded from the swapAB envelope (swapAB is instantiated at topk=2048 only). Assisted-by: OpenAI Codex Co-authored-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com> Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
…verage Follow-up to the PR flashinfer-ai#4791 carry with our-side extensions: - decode_dsv3_2 instantiates GLM53_NOPE at (64, 2176) alongside (32, 2176). The kernel is head-count generic (H_BLOCKS = ceil(H / HPB), zero-padded partial tiles), so the new pair is a pure instantiation; GPU-verified against the reference at H=64. - swapAB prefill now serves GLM53_NOPE at topk=2176: dispatch_v32_swapab picks TOPK=2176 for GLM53_NOPE, the SWAPAB switch branch shares the DISPATCH_V32 macro, and the planner admits NOPE in _SWAPAB_MODEL_TYPES. GPU-verified: forced prefill_impl='swapab' matches _ref_sparse_attn at H in {64, 128} (atol=rtol=5e-2), and the auto policy's pick is bitwise-identical to forced swapab. - The cpb model covers a separate glm53_nope family key (656 B/token, d_qk=512), measured directly rather than aliasing dsv3_2: the topk=2176-only decode instantiation fixes N=34, so its calibration grid isolates the bandwidth term from a wide cpb pair (17 vs 33) at identical waves and split count instead of an N pair (a narrow pair lands under min-of-iters timing noise). calibrate_crossover covers the glm53_nope key space, and the calibration smoke test is parametrized over both families. Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
Carry PR flashinfer-ai#4791 (lucamotz, codex/glm53-nope-sm120-native) into the sm120-sparse-mla-decode-consolidated branch, adapted onto the plan-layer dispatch refactor. Adds ModelType::GLM53_NOPE: GLM-5.3-Flash rope-free sparse MLA with the 512+0 query layout (D_ROPE=0) on the stable 656B/token packed-cache ABI (bytes [528:656) reserved padding, never treated as RoPE), inline 4xFP32 arbitrary scales, topk=2176 (2048 sparse selection + 128-token indexer tail). Rides the V32 kernel family: decode-dsv3_2 with the D_QK==576 || GLM53_NOPE&&512 relaxation, prefill SG/MG at TOPK=2176, Q rope load/quantize, QK rope MMA, and smem rope segments all 0-trip or 0-byte under D_ROPE=0 (decode's rope bulk copy is guarded so the expect-tx accounting stays exact). Python: d_qk=512 + kv_scale_format='arbitrary_fp32' resolves to GLM53_NOPE (auto stays DSV4); the plan module's envelope table gains the family (decode (32,2176); prefill SG/MG at topk=2176), and supported_sparse_mla_sm120_configs() exposes it as 'glm53_nope'. Carry adaptations (ours, not the PR's): the PR's dispatch macro change instantiated GLM53_NOPE decode at all twenty DSV3_2 (H, topk) pairs; only the model-specific (32, 2176) is kept so the C++ envelope matches the Python claims exactly. The PR's prefill dispatch_v32 hunk is mapped onto the flat per-variant PrefillVariant switch, and the swapAB kernel's rope helpers are called through the PR's MT-templated signatures. GLM53_NOPE is excluded from the swapAB envelope (swapAB is instantiated at topk=2048 only). Assisted-by: OpenAI Codex Co-authored-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com> Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
…verage Follow-up to the PR flashinfer-ai#4791 carry with our-side extensions: - decode_dsv3_2 instantiates GLM53_NOPE at (64, 2176) alongside (32, 2176). The kernel is head-count generic (H_BLOCKS = ceil(H / HPB), zero-padded partial tiles), so the new pair is a pure instantiation; GPU-verified against the reference at H=64. - swapAB prefill now serves GLM53_NOPE at topk=2176: dispatch_v32_swapab picks TOPK=2176 for GLM53_NOPE, the SWAPAB switch branch shares the DISPATCH_V32 macro, and the planner admits NOPE in _SWAPAB_MODEL_TYPES. GPU-verified: forced prefill_impl='swapab' matches _ref_sparse_attn at H in {64, 128} (atol=rtol=5e-2), and the auto policy's pick is bitwise-identical to forced swapab. - The cpb model covers a separate glm53_nope family key (656 B/token, d_qk=512), measured directly rather than aliasing dsv3_2: the topk=2176-only decode instantiation fixes N=34, so its calibration grid isolates the bandwidth term from a wide cpb pair (17 vs 33) at identical waves and split count instead of an N pair (a narrow pair lands under min-of-iters timing noise). calibrate_crossover covers the glm53_nope key space, and the calibration smoke test is parametrized over both families. Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
Wire FlashInfer's native 512+0, top-k 2176 SM120 kernel with capability-gated Triton fallback. Add an opt-out for synchronized distributed FlashInfer autotuning to avoid multi-node deadlocks without GPUDirect RDMA.\n\nRefs: flashinfer-ai/flashinfer#4791\nRefs: vllm-project#52292\n\nCo-authored-by: Luca Motz <321921718+lucamotz@users.noreply.github.com>\nCo-authored-by: Bryan Tran <bryan@punknown.net>
Wire FlashInfer's native 512+0, top-k 2176 SM120 kernel with capability-gated Triton fallback. Add an opt-out for synchronized distributed FlashInfer autotuning to avoid multi-node deadlocks without GPUDirect RDMA. Refs: flashinfer-ai/flashinfer#4791 Refs: vllm-project#52292 Co-authored-by: Luca Motz <321921718+lucamotz@users.noreply.github.com> Co-authored-by: Bryan Tran <bryan@punknown.net>
Wire FlashInfer's native 512+0, top-k 2176 SM120 kernel with a capability-gated Triton fallback. Refs: flashinfer-ai/flashinfer#4791 Co-authored-by: Luca Motz <321921718+lucamotz@users.noreply.github.com>
Carry PR flashinfer-ai#4791 (lucamotz, codex/glm53-nope-sm120-native) into the sm120-sparse-mla-decode-consolidated branch, adapted onto the plan-layer dispatch refactor. Adds ModelType::GLM53_NOPE: GLM-5.3-Flash rope-free sparse MLA with the 512+0 query layout (D_ROPE=0) on the stable 656B/token packed-cache ABI (bytes [528:656) reserved padding, never treated as RoPE), inline 4xFP32 arbitrary scales, topk=2176 (2048 sparse selection + 128-token indexer tail). Rides the V32 kernel family: decode-dsv3_2 with the D_QK==576 || GLM53_NOPE&&512 relaxation, prefill SG/MG at TOPK=2176, Q rope load/quantize, QK rope MMA, and smem rope segments all 0-trip or 0-byte under D_ROPE=0 (decode's rope bulk copy is guarded so the expect-tx accounting stays exact). Python: d_qk=512 + kv_scale_format='arbitrary_fp32' resolves to GLM53_NOPE (auto stays DSV4); the plan module's envelope table gains the family (decode (32,2176); prefill SG/MG at topk=2176), and supported_sparse_mla_sm120_configs() exposes it as 'glm53_nope'. Carry adaptations (ours, not the PR's): the PR's dispatch macro change instantiated GLM53_NOPE decode at all twenty DSV3_2 (H, topk) pairs; only the model-specific (32, 2176) is kept so the C++ envelope matches the Python claims exactly. The PR's prefill dispatch_v32 hunk is mapped onto the flat per-variant PrefillVariant switch, and the swapAB kernel's rope helpers are called through the PR's MT-templated signatures. GLM53_NOPE is excluded from the swapAB envelope (swapAB is instantiated at topk=2048 only). Assisted-by: OpenAI Codex Co-authored-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com> Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
…verage Follow-up to the PR flashinfer-ai#4791 carry with our-side extensions: - decode_dsv3_2 instantiates GLM53_NOPE at (64, 2176) alongside (32, 2176). The kernel is head-count generic (H_BLOCKS = ceil(H / HPB), zero-padded partial tiles), so the new pair is a pure instantiation; GPU-verified against the reference at H=64. - swapAB prefill now serves GLM53_NOPE at topk=2176: dispatch_v32_swapab picks TOPK=2176 for GLM53_NOPE, the SWAPAB switch branch shares the DISPATCH_V32 macro, and the planner admits NOPE in _SWAPAB_MODEL_TYPES. GPU-verified: forced prefill_impl='swapab' matches _ref_sparse_attn at H in {64, 128} (atol=rtol=5e-2), and the auto policy's pick is bitwise-identical to forced swapab. - The cpb model covers a separate glm53_nope family key (656 B/token, d_qk=512), measured directly rather than aliasing dsv3_2: the topk=2176-only decode instantiation fixes N=34, so its calibration grid isolates the bandwidth term from a wide cpb pair (17 vs 33) at identical waves and split count instead of an N pair (a narrow pair lands under min-of-iters timing noise). calibrate_crossover covers the glm53_nope key space, and the calibration smoke test is parametrized over both families. Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
## Summary Consolidated SM120 sparse-MLA rework, decode + prefill. All numbers on RTX PRO 6000 (SM120). - **Faster decode, small T**: T=1 14.9 → **11.3µs** (−24%, graph replay, dual-cache 18K context); bitwise-identical outputs. - **Calibrated dispatch**: an analytical `chunks_per_block` model + measured decode/prefill crossover replace the per-shape autotune sweep and the hard `T ≤ 64` cutoff (up to −61% on rerouted configs; tables below). - **Continuous envelopes**: decode serves any `num_heads ∈ [1,128]` and any `topk ≥ min_topk`; prefill serves any `T ≥ 1` and any `topk % 64 == 0` width. Runtime-topk prefill drops instantiations **75 → 55**. - **swapAB prefill** carried from #4751 behind a per-call `prefill_impl` override; independently re-benched at **1.12–2.37×** over MG. - **Two new model types**: `GLM53_NOPE` (carried from #4791) and `DOTS3_SWA` (sliding-window MLA, d_qk=1088, d_v=1024, 1160 B/token footer-scale, padded-row KV support) — the latter also fixing five latent bugs along the way (rope writeback overrun at D_V==D_NOPE, flat-vs-paged addressing keyed on the wrong trait, a Python chunk-width hardcode, an undersized amax scratch at 4 math warps, a vestigial SG register array). - **Public runner**: `flashinfer.mla.SparseMLASm120Wrapper` — one persistent instance, memoized dispatch, CUDA-graph-safe (decode scratch is routing-aware and instance-owned). - Merged current main, incl. the #4732 SM121 prefill-hang fix. - Also: row-strided `indices` (unblocks vllm-project/vllm#53574's persistent-buffer narrowing) and row-strided `out_lse`; T=0 decode returns empty instead of aborting; decode bindings now validate `out_lse`/index dtypes/dim0. Carries (authorship preserved): #4461 zero-token decode (rewritten; XingSong), #4551 dispatch diagnostics + `supported_sparse_mla_sm120_configs()` (Sam Mausberg), #4751 swapAB (Lemon7-UP), #4791 GLM53_NOPE (lucamotz; extended with H=64/TP1 decode, swapAB@2176, calibration coverage). Supersedes #4683: its per-shape sweep profiles L2-resident synthetic indices, which distorts cpb when production caches are DRAM-resident (observed on 5070 Ti) — this PR removes the sweep instead (thanks Sam for the original analysis). ## Performance vs main (adc49a8) Same GPU, fixed-seed identical inputs, CUDA-graph replay GPU-only, both sides out-of-box (no tactic cache / no calibrated constants). Only surfaces present on both sides listed. | shape | main | PR | speedup | |---|---|---|---| | dsv4-dual-h64 (topk 128+512), T=1 | 14.80µs | 11.40µs | 1.30x | | dsv4-dual-h64 (topk 128+512), T=8 | 19.80µs | 16.14µs | 1.23x | | dsv4-dual-h64 (topk 128+512), T=16 | 36.66µs | 29.46µs | 1.24x | | dsv4-dual-h64 (topk 128+512), T=64 | 97.19µs | 89.79µs | 1.08x | | dsv4-h128 (topk 1024), T=1 | 14.70µs | 11.44µs | 1.29x | | dsv4-h128 (topk 1024), T=64 | 231.60µs | 219.79µs | 1.05x | | dsv3_2-h64 (topk 2048), T=1 | 14.08µs | 10.68µs | 1.32x | | dsv3_2-h64 (topk 2048), T=64 | 216.78µs | 220.23µs | 0.98x | | dsv3_2-h128 (topk 2048), T=1 | 16.57µs | 14.08µs | 1.18x | | dsv3_2-h128 (topk 2048), T=64 | 324.19µs | 323.53µs | 1.00x | | dsv4-prefill-h128 (topk 1024), T=128 | 293.82µs | 266.49µs | 1.10x | | dsv4-prefill-h128 (topk 1024), T=2048 | 4486.89µs | 3928.68µs | 1.14x | | dsv4-prefill-dual-h64 (topk 128+512), T=128 | 124.66µs | 124.64µs | 1.00x | | dsv4-prefill-dual-h64 (topk 128+512), T=2048 | 1559.56µs | 1559.35µs | 1.00x | Decode gains concentrate at small T (launch-bound); the two decode commits behind them: `quantize_q_to_smem` rewritten as a vectorized single pass (3 `bar.sync` → 1), and the decode-dsv4 IO gather reads each candidate's index once instead of twice. T=64 decode and dual-cache prefill are unchanged within noise. ## swapAB prefill (#4751) Re-benched on the PRO 6000 (#4751's table was measured on a PRO 5000), same grid, MG↔swapAB cross-checked at 5e-2 on identical inputs, `auto` bitwise-identical to forced swapAB: | shape | MG | swapAB | speedup | |---|---|---|---| | H=64, T=128 | 250.8µs | 159.7µs | 1.57× | | H=64, T=512 | 798.7µs | 565.6µs | 1.41× | | H=64, T=2048 | 2948.1µs | 2158.6µs | 1.37× | | H=64, T=8192 | 11673.6µs | 8607.7µs | 1.36× | | H=128, T=128 | 349.6µs | 267.9µs | 1.30× | | H=128, T=512 | 1348.2µs | 840.0µs | 1.60× | | H=128, T=2048 | 5330.9µs | 3011.6µs | 1.77× | | H=128, T=8192 | 21156.9µs | 11847.7µs | 1.79× | Wins everywhere; the H=64 large-T plateau (~1.4×, one CTA per token saturates ~1280 GB/s vs ~1860 at H=128) is a flat asymptote out to T=32768, so no dispatch range limit. KV layout and all parameters unchanged; both scale formats, sinks, and variable `topk_length` supported. `prefill_impl`: `"auto"` (default) / `"swapab"` / `"mg"`; forcing swapab at an ineligible shape raises. ## Dispatch: cpb model + crossover **cpb model** — analytical pick over gather bandwidth/latency, per-block overhead, and the exact list-scheduling makespan of the split grid, with an L2-footprint guard rail (at topk=1024+2176 dual the heuristic picks a single 50-chunk block at 2.7× L2 — ncu: L2 hit 69.7% vs 86.8%, costing 33%; the guard recovers it to 1.02×). Calibrated once per device inside `autotune()` tuning mode (6 fixed measurements over a ~2 GiB pool, timed as queued batches over rotating fresh index sets — launch latency overlaps execution, and the batch length keeps each set's reuse distance past an L2 turnover; small numpy LM fit; any failure = silent fallback to the C++ heuristic, so the new path can't be worse than status quo). Offline pick error vs exhaustive sweep (DRAM-cold protocol): **mean 1.011× / max 1.061×**; beats the heuristic by up to **1.37×** at mid shapes. A GPU accuracy-guard test fails loudly if a future kernel change breaks the model's assumptions, measured with the same protocol the calibration runs. Host cost ~8µs/call, memoized; zero per-replay under CUDA graphs. **Per-shape refinement** — the model's residual pick error concentrates at mid-T wave-quantization shapes (measured up to **1.35×**, e.g. DOTS3_SWA T=32: 78.0µs → 57.8µs). tuning-mode decode-form calls time the model pick ±6 candidates with the calibration protocol and persist the measured best as a per-shape override in the same tuning cache; `_resolve_cpb` consults overrides first, then the model. Across 12 production bucket shapes (T=16..64, three families, two-pass re-timing): **never worse than the model (12/12), closes every pocket to ≤1.03×**. Shapes never warmed (off-graph calls, arbitrary T, dual-cache) stay on the model. Capture-time calls only read the table/model and freeze — no measurement ever runs under graph capture or in serving. **Crossover** — per-config `decode_max_tokens` measured during the same tuning pass (probe T ∈ {4..64}, both paths, DRAM-faithful fresh indices; decode wins iff ≤ 0.95× prefill). Uncalibrated behavior is unchanged. Measured examples: | config | `decode_max_tokens` | Σ T∈{24,32,48,64}: old policy → calibrated | |---|---|---| | DSv3.2 H=128 topk=2048 (swapAB side) | 8 | 1271.4 → 494.0 µs (−61%) | | DSv4 H=64 topk=512 | 24 | 292.3 → 216.7 µs (−26%) | | DSv4 H=64 topk=128 | 16 | 132.3 → 96.7 µs (−27%) | | DSv4 H=8 topk=1024 | 64 (decode dominates) | no rerouting | Full per-probe data for all 71 calibrated configs: kernel-bench `crossover-v5` baseline. A public `calibrate_sparse_mla_sm120(device, heads=, topks=, families=, force=)` makes any envelope shape tunable outside tuning mode (idempotent skip-existing; `force=True` re-measures). ## Runtime envelopes (head counts and topk widths) - **Decode**: any H ∈ [1,128] — dedicated instantiations on the production grid (0.9–2.5% faster), one runtime-H instance otherwise, **40/40 bitwise-identical** between the two. Any `topk ≥ min_topk` (1; 513 for DOTS3_SWA so the window fits). The `_DECODE_*_DISPATCH` objects vLLM probes are membership predicates with exactly this meaning; `supported_sparse_mla_sm120_configs()` exposes the envelopes for init-time validation. Off-grid example: H=80 T=16 is 1.14× faster than the pad-to-128 workaround callers needed before. - **Prefill**: same topk rule across SG / MG / dual / swapAB. One deliberate residual asymmetry: **decode serves ragged widths (partial tail chunk, tested at topk=500); prefill requires whole 64-wide index tiles** — all production topk widths qualify, tail support needs predicated gathers + tail masking across the IO and math paths, and is deferred until a model needs it. This is safe at the routing layer: a ragged decode-form call has no prefill envelope and simply stays on decode (no crossover), and a ragged T>64 call fails loudly at the binding. 50-config parity vs the pinned build: worst **+0.94%**. One variant needed kernel-side help: DOTS3_SWA SG's BI=32 tiles are too short to cover the index→rope address-chain latency once the compile-time trip count disappeared (+24% `long_scoreboard` in NCU). The SG loop now stages the three per-tile index reads one tile ahead in registers, `if constexpr`-scoped to short tiles (unconditional staging taxed BI=64 SG +2.3%). Net: **374.6µs vs the pinned build's 380.7µs** at H=64/T=256, registers flat, `long_scoreboard` back to parity. ## Plan layer All dispatch policy lives in one memoized Python planner (`_sparse_mla_sm120_plan.py`): each variant declares its envelope once, `plan()` picks by envelope + crossover + `prefill_impl`. The C++ side is a policy-free launcher registry (the old `dispatch_v32` chain is deleted). Single-sourcing surfaced two latent upstream bugs, fixed here: prefill launchers never checked `page_block_size` against the compiled 64 (silent wrong-stride launch), and dual-cache decode-form DSv3.2-family calls silently ignored the secondary cache. ## Runner and CUDA graphs `SparseMLASm120Wrapper` holds buffers persistently: LSE pre-sized at construction, decode split-K scratch allocated only when the call actually routes to decode and cached for the instance's lifetime (a per-call temporary's freed block can be recycled into a later capture while an older graph replays into it). Capture contract: construct and warm up every captured shape before capture (or pass `out_lse`/scratch explicitly); replay is pure graph replay with zero Python. Both routing variants are correct for any T, so a crossover inside a padding bucket is at worst suboptimal, never wrong. GPU tests pin capture/replay for crossover dispatch and for runner-internal scratch. ## Compatibility Public Python API: unchanged except additive kwargs; `flashinfer.mla` exports purely additive; no-constants path behaves exactly as today. Deliberate behavior changes: - Per-shape tactic caches (`sparse_mla_sm120_decode_dsv{4,3_2}.json`) are ignored; the new calibration file is schema-versioned (v1), unrecognized versions treated as absent and recalibrated. - `autotune(True)` runs a one-time-per-device calibration (~2 GiB transient pool) instead of profiling each new shape; honors `skip_ops={"sparse_mla_sm120"}`; refuses to run under CUDA graph capture; cache writes serialized with a FileLock. - With calibration present, decode-form calls beyond the measured crossover route to prefill (the point of the feature). - T ≤ 64 shapes outside the old fixed grid now take the runtime decode instantiation instead of raising. - Prefill serves any `topk % 64 == 0` (≥ 513 for DOTS3_SWA); ragged widths fail at the binding. - Inline-scale (DSv3.2/GLM) KV caches must be contiguous through the paged entry (prefill flat-addresses the cache and crossover makes routing dynamic); contiguous padded-row caches remain decode-served and fail loudly only if prefill-routed. - `indices`/`out_lse` may be row-strided views (widening); the decode binding previously corrupted a strided `out_lse` silently. - C++ launcher entries gained row-stride parameters — internal to the JIT module, no stable ABI consumers. Out of scope (tracked follow-ups): H=64 swapAB bandwidth at large T; a pinned-topk fast path à la decode-H for DOTS3_SWA SG (locked clocks show ~2% there, boost clocks show nothing — not worth the instantiation axis on current evidence). ## Test plan All on RTX PRO 6000: **658 passed** across `test_sparse_mla_sm120{,_dispatch,_cpb_model}.py` and `test_autotuner_core.py`, pre-commit clean — including the 68-config small-T prefill matrix vs the reference (T ∈ {1..64} × SG/MG/swapAB/dual × sink/truncation), 27 C++⟺Python envelope-consistency probes, runtime-H/topk parity gates (bitwise where required), crossover routing + CUDA-graph capture/replay tests, runner scratch routing/lifetime tests, and the review-round regression tests (row-strided `out_lse`, cpb save/publish/FileLock, grid-completeness gating, padded-cache rejection, skip_ops/capture guards). This PR was prepared with AI assistance; all changes reviewed and tested locally by the submitter. --------- Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com> Co-authored-by: XingSong <sunwenhan@xfusion.com> Co-authored-by: Sam Mausberg <samuelmausberg@gmail.com> Co-authored-by: Lemon7-UP <fearless192@163.com> Co-authored-by: Luca Motz <321921718+lucamotz@users.noreply.github.com> Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com> Co-authored-by: Brian K. Ryu <bryu@nvidia.com>
📌 Description
Add native NoPE support to the SM120/SM121 sparse-MLA backend for the
GLM-5.3-Flash geometry:
512+0);as reserved padding rather than positional-key data;
(2048 sparse selections plus the 128-token indexer window).
The change makes the RoPE register/prefetch helpers model-dimensional so a
zero-width RoPE specialization performs no positional loads or MMA. Existing
DSv3.2, GLM-NSA, and DSV4 enum values and dispatch behavior are preserved.
Numerical tests cover both the decode path and the first prefill-sized token
count against the existing PyTorch sparse-attention reference. They also check
arbitrary, non-power-of-two inline scales and the padded cache layout.
Deployment-only compatibility changes from the qualified downstream image
(a fused-MoE ABI guard and a JIT cache-busting module name) are intentionally
excluded.
🔍 Related Issues
[Model] add GLM-5.3-Flash support vllm-project/vllm#53906.
NoPE alternative; this PR provides the native
512+0FlashInfer contractinstead.
same SM120 prefill files for an independent swapped-MMA optimization. This
branch may need a mechanical rebase if that PR lands first.
🚀 Pull Request Checklist
Thank you for contributing to FlashInfer! Before we review your pull request, please make sure the following items are complete.
✅ Pre-commit Checks
pre-commitin an isolated development environment.pre-commit install(temporary clean clone;hooks were invoked directly instead).
Ruff lint/format, whitespace, case-conflict, merge-conflict, and file checks
passed.
🧪 Tests
main; the submitting Mac has no CUDAdevice or PyTorch environment, so the new CUDA tests require Spark/SM12x CI.
Static results on FlashInfer
main286eee4e2999a825716eab68e597cb1ee0881e1b:git diff --checkpassed;changed-file hooks passed.
The same native kernel contract previously passed independently on two NVIDIA
GB10 GPUs (SM 12.1, 101,376 bytes opt-in shared memory) in the qualified ARM64
CUDA 13 derivative: real
512+0geometry, 32 heads, top-k 2176 decode,realistic prefill, arbitrary FP32 scales, and the 656-byte packed cache ABI.
The final TP2 integration endpoint using that derivative passed health and
identity checks, simultaneous full-c2 decode at 491,520 tokens, and two
concurrent near-limit requests. These are downstream integration receipts, not
a substitute for running the added tests against this rebased commit.
Reviewer Notes
This is intentionally a draft until the two added cases run on Spark/SM12x
against current
main. Please focus review on the zero-width RoPE specialization,the preserved 656-byte ABI, and whether the
(32, 2176)instantiation belongsin the durable SM120 dispatch table.
This change and PR description were prepared with OpenAI Codex assistance. The
human submitter reviewed the ownership split and is responsible for the code,
rationale, and reported evidence.
Summary by CodeRabbit
New Features
Bug Fixes
Tests