This repository was archived by the owner on Sep 27, 2023. It is now read-only.
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Description:
Add GPIO interrupt abstraction and rewrite some stuff.
The basic problem is that all code that runs in ISR needs to be tagged ICACHE_RAM_ATTR so that it gets linked into instruction ram. This is because fetching data from flash in an ISR context results in an exception (fetching the data relies itself on an interrupt, but that will never fire while in an ISR).
Unfortunately, vtables are also stored in flash, so all classes that use multiple-inheritance and alike will result in these exceptions as well - same is potentially true for all C++ std library calls, so we're limited to bare minimums C with no cstdlib calls.
Related issue (if applicable): fixes esphome/feature-requests#71, fixes esphome/feature-requests#70
Pull request in esphome with python changes (if applicable): esphome/esphome#
Pull request in esphome-docs with documentation (if applicable): esphome/esphome-docs#
Checklist:
If user exposed functionality or configuration variables are added/changed: