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@kroening kroening commented Jan 9, 2026

This introduces verilog_generate_declt as a separate module item, to obtain consistency with the other generate region items.

@kroening kroening force-pushed the verilog_generate_decl branch 3 times, most recently from 35b5dbf to 99bbb12 Compare January 9, 2026 21:45
@kroening kroening marked this pull request as ready for review January 9, 2026 21:46
This introduces verilog_generate_declt as a separate module item, to obtain
consistency with the other generate region items.
@kroening kroening force-pushed the verilog_generate_decl branch from 99bbb12 to e821a55 Compare January 9, 2026 22:02
@tautschnig tautschnig merged commit c780f61 into main Jan 12, 2026
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@tautschnig tautschnig deleted the verilog_generate_decl branch January 12, 2026 11:11
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3 participants