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Add muldiv_c
and muxadd
peepopts
#4740
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Hi Akash, I looked over the muxadd pattern
for (auto bit : add_y) | ||
if (nusers(bit) != 2) | ||
reject; |
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for (auto bit : add_y) | |
if (nusers(bit) != 2) | |
reject; | |
if (nusers(add_y) != 2) | |
reject; |
is all we need and more idiomatic.
We know nusers(add_y) >= 2
by this being an output from add
and mux
being connected to it too. If any bit has an extra fanout then nusers(add_y) > 2
std::swap(add_a, add_b); | ||
endcode | ||
|
||
match mux |
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We can also match on the case of swapped mux inputs
match mux | ||
// Select mux of form s ? (a + b) : a, allow leading 0s when A_WIDTH != Y_WIDTH | ||
select mux->type == $mux | ||
index <SigSpec> port(mux, \A) === SigSpec({Const(State::S0, GetSize(add_y)-GetSize(add_a)), add_a}) |
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This should be zero-padded if !param(add, \A_SIGNED).bool()
and sign-extended otherwise (provided add_a
is the A
input)
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Also I am not sure this doesn't crash on add_y < add_a
which I don't think we rule out anywhere
|
||
match add | ||
// Select adder | ||
select add->type == $add |
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select add->type == $add | |
select add->type == $add | |
choice <IdString> A {\A, \B} | |
define <IdString> B (A == \A ? \B : \A) | |
set add_y port(add, \Y) | |
set add_a port(add, A) | |
set add_b port(add, B) | |
set add_a_signed param(add, (A == \A) ? \A_SIGNED : \B_SIGNED)) | |
set add_a_id A |
and replace the branch-and-swap pattern further below
Requires new state
state <bool> add_a_signed
state <IdString> add_a_id
mux->setPort(\A, Const(State::S0, GetSize(add_b))); | ||
mux->setPort(\B, add_b); | ||
mux->setPort(\Y, mid); | ||
add->setPort(\B, mid); |
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Wrong side of the adder if the swap above was hit (we need to use add_a_id
instead)
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Err, more like add_b_id
Thanks for the feedback on |
std::swap(a, b_const); | ||
endcode | ||
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||
match div |
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No check that the divider and multiplier are connected
What are the reasons/motivation for this change?
This PR adds two peep-hole optimizations that improve netlist quality:
muldiv_c
:y = (a * b_const) / c_const ===> a * eval(b_const / c_const)
ifb_const % c_const == 0
. This implements basic constant propagation for multipliers and dividers with divisible constants.muxadd
:y = s ? (a + b) : a ===> y = a + (s ? b : 0)
. This provides useful restructuring for improving logic optimization.s ? b : 0
can be optimized to a bitwise AND in subsequent optimizations.Explain how this is achieved.
passes/pmgen/peepopt_muldiv_c.pmg
:muldiv_c
peepoptpasses/pmgen/peepopt_muxadd.pmg
:muxadd
peepoptpasses/pmgen/peepopt.cc
: Add to docs and run peepopts duringpeepopt
passpasses/pmgen/Makefile.inc
: Add the new sourcesIf applicable, please suggest to reviewers how they can test the change.
equiv_opt
or FOSSeqy