[rocjitsu] Compact generated operand storage by kuhar · Pull Request #14779 · ROCm/rocm-systems

kuhar · 2026-11-02T02:54:12Z

Use one byte for literal widening and group generated operand fields by
alignment across all ten AMDGPU architectures.

On x86-64, shrink generated operands from 80 to 64 bytes on all ten
targets. For CDNA5, a scalar add with carry drops from 536 to 472 bytes,
a VOP3 move from 400 to 368 bytes, and VOPD from 992 to 864 bytes.

Measure warm userspace CPU counters on a Threadripper PRO 9995WX with
GCC 16 Release/O3 and x86-64-v4, using one simulation worker on one CPU:

Eleven distinct ML inputs, two paired sweeps: cycles -0.67%, L2
data-request misses -3.09%, instructions -0.06%.
Seven small kernels on CDNA3/4/5, three paired sweeps: cycles -0.21%.
By target: CDNA3 -0.11%, CDNA4 +0.65%, CDNA5 -1.16%.

Cycles vary by target despite the same operand size reduction: CDNA5 ML
cycles decrease 1.59%, while CDNA4 increases 0.47%. These measurements
do not isolate the cause of that difference. Use equal-cell geometric
means. Measurements are unreserved, with CPU affinity, a 2.5 GHz frequency
policy, ASLR disabled, wait checking enabled and an exclusive smoke flock.

Use one byte for literal widening and group generated operand fields by alignment across all ten AMDGPU architectures. On x86-64, shrink generated operands from 80 to 64 bytes on all ten targets. For CDNA5, a scalar add with carry drops from 536 to 472 bytes, a VOP3 move from 400 to 368 bytes, and VOPD from 992 to 864 bytes. Measure warm userspace CPU counters on a Threadripper PRO 9995WX with GCC 16 Release/O3 and x86-64-v4, using one simulation worker on one CPU: - Eleven distinct ML inputs, two paired sweeps: cycles -0.67%, L2 data-request misses -3.09%, instructions -0.06%. - Seven small kernels on CDNA3/4/5, three paired sweeps: cycles -0.21%. By target: CDNA3 -0.11%, CDNA4 +0.65%, CDNA5 -1.16%. Cycles vary by target despite the same operand size reduction: CDNA5 ML cycles decrease 1.59%, while CDNA4 increases 0.47%. These measurements do not isolate the cause of that difference. Use equal-cell geometric means. Measurements are unreserved, with CPU affinity, a 2.5 GHz frequency policy, ASLR disabled, wait checking enabled and an exclusive smoke flock.

therock-pr-bot · 2026-11-02T02:54:52Z

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therock-pr-bot · 2026-11-02T02:54:54Z

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What changed in this PR

This PR reduces rocjitsu’s generated AMDGPU operand storage from 80 to 64 bytes on x86-64 across all ten architectures, reducing the size of instruction objects that contain operands.

Changes:

Uses uint8_t for literal-widening enums and reorders fields to reduce alignment padding.
Updates the generator and all ten generated operand headers consistently.
Updates layout assertions for representative operand and instruction types, including VOPD.

File	Description
`emulation/rocjitsu/tests/decode_smoke_test.cpp`	Checks compact operand and instruction sizes.
`emulation/rocjitsu/lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated/rdna4/operand.h`	Compacts RDNA4 operand storage.
`emulation/rocjitsu/lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated/rdna3/operand.h`	Compacts RDNA3 operand storage.
`emulation/rocjitsu/lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated/rdna3_5/operand.h`	Compacts RDNA3.5 operand storage.
`emulation/rocjitsu/lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated/rdna2/operand.h`	Compacts RDNA2 operand storage.
`emulation/rocjitsu/lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated/rdna1/operand.h`	Compacts RDNA1 operand storage.
`emulation/rocjitsu/lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated/cdna5/operand.h`	Compacts CDNA5 operand storage.
`emulation/rocjitsu/lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated/cdna4/operand.h`	Compacts CDNA4 operand storage.
`emulation/rocjitsu/lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated/cdna3/operand.h`	Compacts CDNA3 operand storage.
`emulation/rocjitsu/lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated/cdna2/operand.h`	Compacts CDNA2 operand storage.
`emulation/rocjitsu/lib/rocjitsu/src/rocjitsu/isa/arch/amdgpu/generated/cdna1/operand.h`	Compacts CDNA1 operand storage.
`emulation/rocjitsu/lib/python/amdisa/codegen/_generator.py`	Emits the compact enum and field layout.

_{Review effort: Balanced}

IanWood1

LGTM!

IanWood1 · 2026-11-03T05:59:50Z

                '  uint64_t widened_literal32_value() const;\n'
+                '  // Pack literal state with the byte-sized widening enum to keep operands at 64 bytes.\n'
+                '  uint64_t literal64_value_ = 0;\n'
+                '  std::optional<Literal32Widening> literal32_widening_;\n'


Moving this field before execution_backend_ lets it use part of the four bytes of tail padding in the base class (IsaOperand<Isa>), leaving room at the end for future flags without increasing the operand size.

github-actions · 2026-11-03T18:54:18Z

rocjitsu post-commit fuzz passed

The 32-worker multiplexer campaigns for commit 2b3c00291b7d completed without recording a crash or hang.

ASan+UBSan (6-minute): 644,826 input executions (1,828.32 inputs/s)
TSan (6-minute): 522,159 input executions (1,490.95 inputs/s)

View the workflow run.

systems-assistant · 2026-11-05T15:45:07Z

TheRock Submodule Bump Activity

Newest first

2026-11-05 — Included in TheRock via ROCm/TheRock#9739.

kuhar requested review from a team and atgutier as code owners November 2, 2026 02:54

Copilot AI balanced review requested due to automatic review settings November 2, 2026 02:54

github-actions Bot added the project: rocjitsu label Nov 2, 2026

Copilot started reviewing on behalf of kuhar November 2, 2026 02:54

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systems-assistant Bot added the organization: ROCm label Nov 2, 2026

kuhar requested review from IanWood1, newling and sjain-stanford November 2, 2026 11:20

IanWood1 approved these changes Nov 3, 2026

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newling approved these changes Nov 3, 2026

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kuhar merged commit 2b3c002 into develop Nov 3, 2026
139 of 148 checks passed

kuhar deleted the users/kuhar/perf-operand-packing branch November 3, 2026 18:29

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[rocjitsu] Compact generated operand storage - #14779

[rocjitsu] Compact generated operand storage#14779
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