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[tensile] Fix SIA0 PGR2 global-read placement - #8417

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cycheng merged 2 commits into
developfrom
users/cycheng2/fix-f32_gfx1250.yaml
Jun 23, 2026
Merged

cycheng merged 2 commits into
developfrom
users/cycheng2/fix-f32_gfx1250.yaml

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@cycheng

@cycheng cycheng commented Jun 15, 2026 •

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Defer SIA0 non-TDM PGR2 global reads until after the local-write iteration consumes the previous vgprG2L values, and keep tail local-read offsets reset before tail MACs.

This prevents next-prefetch buffer loads from clobbering data before it is stored to LDS.

Test Result

(1) Codegen test: asm code (before v.s. after)

  • tensilelite/Tensile/Tests/common/sparse/gfx1250
  • tensilelite/Tensile/Tests/common/gemm/gfx12/*gfx1250.yaml
    3062 kernels, 69 yamls
    difference only on:
  • spmm_f16.yaml, spmm_tdm_multicast.yaml, tdm_multicast_gfx1250.yaml, xfp32_gfx1250.yaml
  • some of the diff is due to random label name, e.g. "label_skipCBPreSignal_G4WJQDrkWmj0GMLJ"
  • others are as expectation: "Tail: local read reset offsets a, b" is added

(2) In runtime test, the following are failed but not related to this PR.
spmm_f8hs.yaml, spmm_f8_ml.yaml, spmm_f8.yaml, fp16_gfx1250.yaml, mxf8_gfx1250.yaml, mxf8f4ss_gfx1250.yaml, subtile_bf16_gfx1250_cluster.yaml

Submission Checklist

@codecov-commenter

codecov-commenter commented Jun 15, 2026 •

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Codecov Report

❌ Patch coverage is 33.33333% with 4 lines in your changes missing coverage. Please review.

Files with missing lines Patch % Lines
...ects/hipblaslt/tensilelite/Tensile/KernelWriter.py 0.00% 4 Missing ⚠️

❌ Your project status has failed because the head coverage (77.90%) is below the target coverage (80.00%). You can increase the head coverage or adjust the target coverage.

Additional details and impacted files
@@             Coverage Diff             @@
##           develop    #8417      +/-   ##
===========================================
- Coverage    65.62%   65.54%   -0.08%     
===========================================
  Files         2610     2613       +3     
  Lines       405606   406914    +1308     
  Branches     60526    60726     +200     
===========================================
+ Hits        266159   266708     +549     
- Misses      119412   120093     +681     
- Partials     20035    20113      +78     
Flag Coverage Δ *Carryforward flag
TensileLite 31.24% <33.33%> (+0.20%) ⬆️
hipBLAS 90.62% <ø> (ø) Carriedforward from e2957c8
hipBLASLt 41.38% <ø> (+0.13%) ⬆️
hipCUB 82.68% <ø> (ø) Carriedforward from e2957c8
hipDNN 86.69% <ø> (ø) Carriedforward from e2957c8
hipFFT 50.52% <ø> (ø) Carriedforward from e2957c8
hipRAND 76.12% <ø> (ø) Carriedforward from e2957c8
hipSOLVER 69.18% <ø> (ø) Carriedforward from e2957c8
hipSPARSE 86.55% <ø> (ø) Carriedforward from e2957c8
rocBLAS 48.08% <ø> (ø) Carriedforward from e2957c8
rocFFT 55.34% <ø> (ø) Carriedforward from e2957c8
rocRAND 57.04% <ø> (ø) Carriedforward from e2957c8
rocSOLVER 77.90% <ø> (ø) Carriedforward from e2957c8
rocSPARSE 72.37% <ø> (ø) Carriedforward from e2957c8
rocThrust 91.34% <ø> (ø) Carriedforward from e2957c8

*This pull request uses carry forward flags. Click here to find out more.

Files with missing lines Coverage Δ
...ts/hipblaslt/tensilelite/Tensile/Components/SIA.py 9.25% <100.00%> (+3.16%) ⬆️
...ects/hipblaslt/tensilelite/Tensile/KernelWriter.py 11.61% <0.00%> (+0.09%) ⬆️

... and 30 files with indirect coverage changes

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@mengzcai mengzcai mentioned this pull request Jun 15, 2026
1 task done
@mengzcai
mengzcai self-requested a review June 16, 2026 07:58
@cycheng

cycheng commented Jun 16, 2026

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I will do more test for gfx1250 to make sure it works correctly.

@mengzcai mengzcai mentioned this pull request Jun 17, 2026
1 task done
Defer SIA0 non-TDM PGR2 global reads until after the local-write
iteration consumes the previous vgprG2L values, and keep tail
local-read offsets reset before tail MACs.

This prevents next-prefetch buffer loads from clobbering data
before it is stored to LDS.
@cycheng
cycheng force-pushed the users/cycheng2/fix-f32_gfx1250.yaml branch from 8020b2b to 312c91d Compare June 18, 2026 08:29
Avoid clearing the tail local-read Blk offset for SIA0 TDM kernels,
whose tail descriptors already select the correct LDS bank. This
preserves the non-TDM SIA0 tail reset fix without regressing TDM
tail reads.
@cycheng
cycheng merged commit 680159d into develop Jun 23, 2026
59 checks passed
@cycheng
cycheng deleted the users/cycheng2/fix-f32_gfx1250.yaml branch June 23, 2026 07:12
davidd-amd added a commit that referenced this pull request Jun 24, 2026
…avior

Update the SIA0 tail-reset golden to develop's current emission
(tail_lr_reset_a/b = True), so the characterization is green on develop and
guards against future regressions of the SIA0 PGR2 non-TDM placement.

The snapshot was first captured against #8417's parent (markers False) to
prove the guard fails-before / passes-after the fix; this commit pins the
post-fix behavior that should hold going forward.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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4 participants