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test(miopen): explain ConvHipImplicitGemmV4R1WrW FP32 tolerance #15150

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Merged
JonathanLichtnerAMD merged 2 commits into from
Nov 6, 2026
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test(miopen): explain ConvHipImplicitGemmV4R1WrW FP32 tolerance #15150

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test(miopen): explain ConvHipImplicitGemmV4R1WrW FP32 tolerance (ALMI…
JonathanLichtnerAMD Nov 5, 2026
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test(miopen): drop ticket id from comment
JonathanLichtnerAMD Nov 5, 2026
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4 changes: 3 additions & 1 deletion projects/miopen/test/gtest/unit_conv_solver_ConvHipImplicitGemmV4R1WrW.cpp
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Expand Up @@ -52,7 +52,9 @@ miopen::unit_tests::UnitTestConvSolverParams GetTestParams()
auto p = miopen::unit_tests::UnitTestConvSolverParams(supported_gpus);
p.Tunable(5);
p.SetConvAttrFp16Alt(0);
/// \todo 40.0f is too much. The solver needs to be checked.
/// The large FP32 tolerance reflects FP32 accumulation order over K = N * Ho * Wo = 193600
/// with zero-mean random data, not a solver defect: the solver was verified to be exact on
/// integer data.
p.SetTolerance(Gpu::gfx908, miopenFloat, 40.0f);
p.SetTolerance(Gpu::gfx90A, miopenFloat, 40.0f);
p.SetTolerance(Gpu::gfx103X, miopenFloat, 40.0f);
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