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test(miopen): explain ConvHipImplicitGemmV4R1WrW FP32 tolerance - #15150
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JonathanLichtnerAMD merged 2 commits intoNov 6, 2026
Merged
JonathanLichtnerAMD merged 2 commits into
JonathanLichtnerAMD merged 2 commits into
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JonathanLichtnerAMD
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JIRA ID: ALMIOPEN-3158
Motivation
Follow-up to #14905 (ROCM-23567). The stale
/// \todo 40.0f is too much. The solver needs to be checked.inunit_conv_solver_ConvHipImplicitGemmV4R1WrW.cppimplied a possible solver defect.Technical Details
Replaces the stale todo with a comment stating the tolerance reflects FP32 accumulation order over K = NHoWo = 193600 with zero-mean random data, not a solver defect. Comment-only; no functional change.
Risk Assessment
Risk Level: 🟢 Low
Comment-only change.
Test Plan
Investigation runs on gfx90a (MI210): measure rms relative error vs the GPU reference (accumulates in double) for N=8/16/32/64, with random data and with small-integer data. Nothing to build since the change is comment-only.
Test Result