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Make pipelined TP comm overlap available with mcore #8005

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Jan 10, 2024
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Original file line number Diff line number Diff line change
Expand Up @@ -792,12 +792,14 @@ def _validate_and_override_config(self):
) % vp_size == 0, 'Make sure the number of model chunks is the same across all pipeline stages.'

if self.cfg.get('ub_tp_comm_overlap', False):
if not self.cfg.get('transformer_engine', False) or not self.cfg.get('sequence_parallel', False):
if self.cfg.get('ub_tp_comm_overlap', False) and not self.cfg.get('sequence_parallel', False):
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@erhoo82 if self.cfg.get('ub_tp_comm_overlap', False) seems to be redundant in L795 as it already exists in L794.

logging.info(
"Userbuffer tensor-parallel communication overlap is available with both Transformer Engine and sequence-parallelism."
"Pipelined tensor-parallel communication overlap is available with sequence-parallelism."
"Setting `ub_tp_comm_overlap` to False."
)
with open_dict(self.cfg):
self.cfg.ub_tp_comm_overlap = False

if self.cfg.get('fsdp', False):
logging.info(
"Userbuffer tensor-parallel communication overlap is not available with FSDP."
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