[dev] fix(moe): fix the bug where gate was not sliced when kv_head < tp_size.

[LiuXTao]

What does this PR do ?

This PR mainly fixes the bug where the gate lacked indexing handling when kv_head < tp_size. The original code only indexed the query, causing an error when output_gate is True.

[rank6]: from user code:
[rank6]:    File "/home/Megatron-LM/megatron/core/transformer/attention.py", line 1226, in _apply_output_gate
[rank6]:     gate = gate.view(*x.shape)
[rank6]: torch._dynamo.exc.TorchRuntimeError: Dynamo failed to run FX node with fake tensors: call_method view(*(FakeTensor(..., device='cuda:6', size=(1128, 1, 16, 256), dtype=torch.bfloat16), 1128, 1, 2048), **{}): got RuntimeError("shape '[1128, 1, 2048]' is invalid for input of size 4620288")

This error refers to the shape mismatch between gate and core_attn_out. Therefore, I added some code to index the gate, similar to query.

PR for main: #3575

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flowchart LR
    A[Pre-checks] --> B[PR Tests]
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        C1[Expert Review] --> C2[Final Review]
    end
    B --> C1
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[yuzhongw-nvidia]

LGTM. Thanks.

[yuzhongw-nvidia]

/ok to test 6c02944

[janEbert]

Hey, would you be so kind to add a test for this? Would be super useful to catch potential future regressions early!

[yuzhongw-nvidia]

Hey, would you be so kind to add a test for this? Would be super useful to catch potential future regressions early!

Thanks for your advice! I have added UTs to capture the fixed error.

[yuzhongw-nvidia]

/ok to test cf94d9f

[yanring]

/ok to test b848275

[yanring]

LGTM

[yanring]

@yuzhongw-nvidia could you help replicate a main PR?

[yuzhongw-nvidia]

@yuzhongw-nvidia could you help replicate a main PR?

Yes. I create one (#3575), and it is ready for review as well.

[yuzhongw-nvidia]

/ok to test ca7d3b5

[svcnvidia-nemo-ci]

🔄 Merge queue validation started!

You can track the progress here: https://github.com/NVIDIA/Megatron-LM/actions/runs/22476908512