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Merged
merged 4 commits into from
May 27, 2020
Merged

Minor changes needed for future commits #553

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8360e8a
Refine condition for CapabilityVector16
NikitaRudenkoIntel May 27, 2020
f2e3214
Remove redundant assert from SPIRVVectorShuffle
NikitaRudenkoIntel May 27, 2020
946a1b2
Add required capabilities for ExecutionModeSubgroupSize
NikitaRudenkoIntel May 27, 2020
aaacb91
Add missing float control capabilities to SPIRVIsValidEnum.h
NikitaRudenkoIntel May 27, 2020
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1 change: 1 addition & 0 deletions lib/SPIRV/libSPIRV/SPIRVEnum.h
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Expand Up @@ -237,6 +237,7 @@ template <> inline void SPIRVMap<SPIRVExecutionModeKind, SPIRVCapVec>::init() {
ADD_VEC_INIT(ExecutionModeOutputTriangleStrip, {CapabilityGeometry});
ADD_VEC_INIT(ExecutionModeVecTypeHint, {CapabilityKernel});
ADD_VEC_INIT(ExecutionModeContractionOff, {CapabilityKernel});
ADD_VEC_INIT(ExecutionModeSubgroupSize, {CapabilitySubgroupDispatch});
ADD_VEC_INIT(ExecutionModeDenormPreserve, {CapabilityDenormPreserve});
ADD_VEC_INIT(ExecutionModeDenormFlushToZero, {CapabilityDenormFlushToZero});
ADD_VEC_INIT(ExecutionModeSignedZeroInfNanPreserve,
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1 change: 0 additions & 1 deletion lib/SPIRV/libSPIRV/SPIRVInstruction.h
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Expand Up @@ -2275,7 +2275,6 @@ class SPIRVVectorShuffle : public SPIRVInstruction {
return;
assert(getValueType(Vector1) == getValueType(Vector2));
assert(Components.size() == Type->getVectorComponentCount());
assert(Components.size() > 1);
}
SPIRVId Vector1;
SPIRVId Vector2;
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5 changes: 5 additions & 0 deletions lib/SPIRV/libSPIRV/SPIRVIsValidEnum.h
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Expand Up @@ -581,6 +581,11 @@ inline bool isValid(spv::Capability V) {
case CapabilityGroupNonUniformShuffleRelative:
case CapabilityGroupNonUniformClustered:
case CapabilityGroupNonUniformQuad:
case CapabilityDenormPreserve:
case CapabilityDenormFlushToZero:
case CapabilitySignedZeroInfNanPreserve:
case CapabilityRoundingModeRTE:
case CapabilityRoundingModeRTZ:
case CapabilityFPGAMemoryAttributesINTEL:
case CapabilityArbitraryPrecisionIntegersINTEL:
case CapabilityFPGALoopControlsINTEL:
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1 change: 1 addition & 0 deletions lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
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Expand Up @@ -495,6 +495,7 @@ template <> inline void SPIRVMap<Capability, std::string>::init() {
add(CapabilityStorageImageWriteWithoutFormat,
"StorageImageWriteWithoutFormat");
add(CapabilityMultiViewport, "MultiViewport");
add(CapabilitySubgroupDispatch, "CapabilitySubgroupDispatch");
add(CapabilityDenormPreserve, "DenormPreserve");
add(CapabilityDenormFlushToZero, "DenormFlushToZero");
add(CapabilitySignedZeroInfNanPreserve, "SignedZeroInfNanPreserve");
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2 changes: 1 addition & 1 deletion lib/SPIRV/libSPIRV/SPIRVType.h
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Expand Up @@ -305,7 +305,7 @@ class SPIRVTypeVector : public SPIRVType {
SPIRVCapVec V(getComponentType()->getRequiredCapability());
// Even though the capability name is "Vector16", it describes
// usage of 8-component or 16-component vectors.
if (CompCount >= 8)
if (CompCount == 8 || CompCount == 16)
V.push_back(CapabilityVector16);
return V;
}
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1 change: 1 addition & 0 deletions test/transcoding/ReqdSubgroupSize.ll
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Expand Up @@ -7,6 +7,7 @@
; RUN: llvm-spirv %t.spv -to-text -o - | FileCheck %s --check-prefix=CHECK-SPIRV
; RUN: llvm-spirv %t.spv -r -o - | llvm-dis -o - | FileCheck %s --check-prefix=CHECK-LLVM

; CHECK-SPIRV: Capability CapabilitySubgroupDispatch
; CHECK-SPIRV: EntryPoint 6 [[kernel:[0-9]+]] "foo"
; CHECK-SPIRV: ExecutionMode [[kernel]] 35 8

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