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Reverse syscall override return register ordering #284

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May 4, 2022
Merged

Reverse syscall override return register ordering #284

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94f896d
Reverse syscall override return register ordering
May 2, 2022
ad21f1c
Explain why register tuple is reversed
May 4, 2022
65cd33b
Add register reverse comment to non-thumb case
May 4, 2022
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10 changes: 6 additions & 4 deletions macaw-aarch32/src/Data/Macaw/ARM/Arch.hs
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Original file line number Diff line number Diff line change
Expand Up @@ -644,8 +644,9 @@ a32InstructionMatcher (ARMDis.Instruction opc operands) =
<*> G.getRegVal (ARMReg.ARMGlobalBV (ASL.knownGlobalRef @"_R6"))
<*> G.getRegVal (ARMReg.ARMGlobalBV (ASL.knownGlobalRef @"_R7"))
res <- G.addExpr =<< evalArchFn sc
G.setRegVal r0 =<< G.addExpr (G.AppExpr (MC.TupleField PC.knownRepr res PL.index0))
G.setRegVal r1 =<< G.addExpr (G.AppExpr (MC.TupleField PC.knownRepr res PL.index1))
-- res is a tuple of form (R1, R0)
G.setRegVal r1 =<< G.addExpr (G.AppExpr (MC.TupleField PC.knownRepr res PL.index0))
G.setRegVal r0 =<< G.addExpr (G.AppExpr (MC.TupleField PC.knownRepr res PL.index1))

-- Increment the PC; we don't get the normal PC increment from the
-- ASL semantics, since we are intercepting them to just add this statement
Expand Down Expand Up @@ -698,8 +699,9 @@ t32InstructionMatcher (ThumbDis.Instruction opc operands) =
<*> G.getRegVal (ARMReg.ARMGlobalBV (ASL.knownGlobalRef @"_R6"))
<*> G.getRegVal (ARMReg.ARMGlobalBV (ASL.knownGlobalRef @"_R7"))
res <- G.addExpr =<< evalArchFn sc
G.setRegVal r0 =<< G.addExpr (G.AppExpr (MC.TupleField PC.knownRepr res PL.index0))
G.setRegVal r1 =<< G.addExpr (G.AppExpr (MC.TupleField PC.knownRepr res PL.index1))
-- res is a tuple of form (R1, R0)
G.setRegVal r1 =<< G.addExpr (G.AppExpr (MC.TupleField PC.knownRepr res PL.index0))
G.setRegVal r0 =<< G.addExpr (G.AppExpr (MC.TupleField PC.knownRepr res PL.index1))
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-- Increment the PC; we don't get the normal PC increment from the
-- ASL semantics, since we are intercepting them to just add this statement
Expand Down
5 changes: 3 additions & 2 deletions macaw-riscv/src/Data/Macaw/RISCV/Disassemble.hs
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Expand Up @@ -340,8 +340,9 @@ disStmt opcode stmt = do
<*> getReg GPR_A6
<*> getReg GPR_A7
res <- evalArchFn ec
setReg GPR_A0 =<< evalApp (MC.TupleField knownRepr res L.index0)
setReg GPR_A1 =<< evalApp (MC.TupleField knownRepr res L.index1)
-- res is a tuple of form (A1, A0)
setReg GPR_A1 =<< evalApp (MC.TupleField knownRepr res L.index0)
setReg GPR_A0 =<< evalApp (MC.TupleField knownRepr res L.index1)
_ -> return ()
F.traverse_ disAssignStmt (collapseStmt stmt)

Expand Down
5 changes: 3 additions & 2 deletions x86/src/Data/Macaw/X86/Generator.hs
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Expand Up @@ -356,8 +356,9 @@ addArchSyscall :: X86Generator st_s ids ()
addArchSyscall = do
sc <- X86Syscall (knownNat @64) <$> getRegValue RAX <*> getRegValue RDI <*> getRegValue RSI <*> getRegValue RDX <*> getRegValue R10 <*> getRegValue R8 <*> getRegValue R9
res <- evalArchFn sc
setReg RAX =<< eval (app (TupleField knownRepr res PL.index0))
setReg RDX =<< eval (app (TupleField knownRepr res PL.index1))
-- res is a tuple of form (RDX, RAX)
setReg RDX =<< eval (app (TupleField knownRepr res PL.index0))
setReg RAX =<< eval (app (TupleField knownRepr res PL.index1))
addTermStmt FetchAndExecute

-- | execute a primitive instruction.
Expand Down