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Fix cpu6 detect #34

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26 changes: 16 additions & 10 deletions cpu6.c
Original file line number Diff line number Diff line change
Expand Up @@ -1058,12 +1058,9 @@ static int dec(unsigned reg, unsigned val)
static int clr(unsigned reg, unsigned v)
{
reg_write(reg, v);
alu_out &= ~(ALU_F | ALU_L | ALU_M);
if (v == 0)
alu_out |= ALU_V;
else
/* Gets us past the tests but is probably wrong */
alu_out ^= ALU_V;
// Explicitly clears L and F flags
alu_out &= ~(ALU_L | ALU_F);
logic_flags(v);
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Would be neat if you describe CPU detection logic somewhere.

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As a comment?

Code just executes a clr to a non-zero value and checks the v flag. As CPU5 doesn't implement "small immediates", it clears to zero and v flag is zero.

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Aha, got it. CPU5 ignored the remaining nibble of the operand, where the constant was pushed in in cpu6.
Still perhaps worth leaving somewhere. In code comments or maybe on wiki.

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Ah so we finally know wtf was going on. Cool

return 0;
}

Expand Down Expand Up @@ -1253,12 +1250,11 @@ static uint16_t dec16(uint16_t a, uint16_t imm)
return r;
}

/* Assume behaviour matches CLR */
static uint16_t clr16(uint16_t a, uint16_t imm)
{
alu_out &= ~(ALU_F | ALU_L | ALU_M);
/* if (imm == 0) */
alu_out |= ALU_V;
// Explicitly clears L and F flags
alu_out &= ~(ALU_L | ALU_F);
logic_flags16(imm);
return imm;
}

Expand Down Expand Up @@ -2402,6 +2398,14 @@ static int semaphore_op(void) {
exit(1);
}

/* 76 - Enable parity checking
* 86 - Disable parity checking
*/
static int parity_op(void) {
// unimplemented
return 0;
}

/*
* The CPU has directly controlled flags for C N Z I
* We know from the branch rules there is an internal V flag
Expand Down Expand Up @@ -2491,6 +2495,8 @@ unsigned cpu6_execute_one(unsigned trace)
return alu5x_op();
if (op == 0x67)
return block_op(0x67, trace);
if (op == 0x76 || op == 0x86)
return parity_op();
if (op < 0x70)
return x_op();
if (op == 0x77 || op == 0x78)
Expand Down