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This repository contains Verilog HDL projects covering arithmetic units, memory blocks, FSMs, and protocols. It’s perfect for VLSI and FPGA learners to practice and understand digital design through synthesizable modules.

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ADHIL48/Verilog-HDL-Project-Hub

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Verilog-HDL-Project-Hub

This repository contains a comprehensive collection of Verilog HDL implementations of fundamental and advanced digital design components. These designs include arithmetic circuits, memory elements, protocol modules, control logic, and FSMs. Ideal for VLSI students, FPGA developers, and anyone learning digital logic design.


📁 Project Categories

🔢 Arithmetic Units

  • 32-bit Adder
  • Array Multiplier
  • Booth Multiplication
  • Carry Lookahead Adder
  • Carry Select Adder
  • Carry Save Adder
  • Carry Skip Adder
  • Complex Multiplier
  • Fraction Multiplier
  • Fixed Point Adder and Subtractor
  • Fixed Point Multiplier and Divider
  • High Radix Multiplier
  • Sequential Multiplier
  • Pipelined Multiplier
  • Shift and Add Binary Multiplier
  • BCD Adder
  • Floating Point IEEE 754 Addition/Subtraction
  • Floating Point IEEE 754 Multiplication
  • Floating Point IEEE 754 Division
  • Modified Booth Algorithm
  • Logarithm Implementation
  • Binary Divider (16 by 8)
  • Restoring and Non-Restoring Division

💾 Memory & Registers

  • Dual Address RAM
  • Dual Address ROM
  • FIFO (First-In First-Out)
  • Universal Shift Register

🔁 State Machines

  • Mealy Sequence Detector
  • Moore Sequence Detector
  • Traffic Light Controller

🔌 Protocols

  • I2C Protocol
  • SPI Protocol

🎮 Miscellaneous

  • Dice Game (FSM-based)
  • Barrel Shifter
  • LFSR & CFSR (Linear & Cellular Feedback Shift Registers)

🔧 Tools & Technologies

  • Language: Verilog HDL
  • Simulation Tools: Icarus Verilog, ModelSim
  • Waveform Viewer: GTKWave
  • Synthesis Tool: Xilinx Vivado (optional)

🚀 Getting Started

  1. Clone this repository:
    git clone https://github.com/ADHIL48/Verilog-HDL-Project-Hub.git
    cd Verilog-HDL-Project-Hub
    

I2C and SPI Protocols
I2C Protocol SPI Protocol
SPI_Master SPI_Loopback IEEE 754 Division IEEE 754 Addition Subtraction IEEE 754 Multiplication CRC Coding
CRC_16_parallel CRC_16_serial CRC_32_parallel CRC_32_serial BCD Adder Dual Address ROM Dual Address RAM Restoring and Non Restoring Division Universal Shift Register Barrel Shifter 8bit Booth Multiplier 32 Bit Adder Mealy State Machine for sequence detection Moore State Machine for sequence detection Array Multiplier Carry Skip Adder Carry Select Adder Carry Look Ahead Adder Carry Save Adder Complex Multiplier Logarithm Implementation Traffic_Light_Controller Shift and Add Binary Multiplier Sequential Multiplier Fixed Point Adder Fixed Point Subtractor Fixed Point Multiplier Fixed Point Divider Fraction_Multiplier FIFO LFSR and CFSR
LFSR CFSR Modified Booth Multiplication Pipelined Multiplier High Radix Multiplication

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This repository contains Verilog HDL projects covering arithmetic units, memory blocks, FSMs, and protocols. It’s perfect for VLSI and FPGA learners to practice and understand digital design through synthesizable modules.

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