Add support for target details (CPUs and their supported features)

lib/std/build.zig

@@ -1199,6 +1199,8 @@ pub const LibExeObjStep = struct {
 
     subsystem: ?builtin.SubSystem = null,
 
+    target_details: ?std.target.TargetDetails = null,
+
     const LinkObject = union(enum) {
         StaticPath: []const u8,
         OtherStep: *LibExeObjStep,
@@ -1384,6 +1386,10 @@ pub const LibExeObjStep = struct {
         self.computeOutFileNames();
     }
 
+    pub fn setTargetDetails(self: *LibExeObjStep, target_details: std.target.TargetDetails) void {
+        self.target_details = target_details;
+    }
+
     pub fn setTargetGLibC(self: *LibExeObjStep, major: u32, minor: u32, patch: u32) void {
         self.target_glibc = Version{
             .major = major,
@@ -1974,6 +1980,28 @@ pub const LibExeObjStep = struct {
             },
         }
 
+        if (self.target_details) |td| {
+            switch (td) {
+                .cpu => |cpu| {
+                    try zig_args.append("--cpu");
+                    try zig_args.append(cpu.name);
+                },
+                .features => |features| {
+                    try zig_args.append("--features");
+
+                    var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
+                    defer feature_str_buffer.deinit();
+
+                    for (features) |feature| {
+                        try feature_str_buffer.append(feature.name);
+                        try feature_str_buffer.append(",");
+                    }
+
+                    try zig_args.append(feature_str_buffer.toOwnedSlice());
+                },
+            }
+        }
+
         if (self.target_glibc) |ver| {
             try zig_args.append("-target-glibc");
             try zig_args.append(builder.fmt("{}.{}.{}", .{ ver.major, ver.minor, ver.patch }));

lib/std/std.zig

@@ -60,6 +60,7 @@ pub const rand = @import("rand.zig");
 pub const rb = @import("rb.zig");
 pub const sort = @import("sort.zig");
 pub const ascii = @import("ascii.zig");
+pub const target = @import("target.zig");
 pub const testing = @import("testing.zig");
 pub const time = @import("time.zig");
 pub const unicode = @import("unicode.zig");

lib/std/target.zig

@@ -458,7 +458,7 @@ pub const Target = union(enum) {
     pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch {
         const info = @typeInfo(Arch);
         inline for (info.Union.fields) |field| {
-            if (mem.eql(u8, text, field.name)) {
+            if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) {
                 if (field.field_type == void) {
                     return @as(Arch, @field(Arch, field.name));
                 } else {
@@ -476,6 +476,31 @@ pub const Target = union(enum) {
         return error.UnknownArchitecture;
     }
 
+    pub fn parseArchTag(text: []const u8) ParseArchSubError!@TagType(Arch) {
+        const info = @typeInfo(Arch);
+        inline for (info.Union.fields) |field| {
+            if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) {
+                if (text.len == field.name.len) return @as(@TagType(Arch), @field(Arch, field.name));
+
+                if (field.field_type == void) {
+                    return error.UnknownArchitecture;
+                }
+
+                const sub_info = @typeInfo(field.field_type);
+                inline for (sub_info.Enum.fields) |sub_field| {
+                    const combined = field.name ++ sub_field.name;
+                    if (mem.eql(u8, text, combined)) {
+                        return @as(@TagType(Arch), @field(Arch, field.name));
+                    }
+                }
+
+                return error.UnknownSubArchitecture;
+            }
+        }
+
+        return error.UnknownArchitecture;
+    }
+
     pub fn parseOs(text: []const u8) !Os {
         const info = @typeInfo(Os);
         inline for (info.Enum.fields) |field| {
@@ -778,3 +803,83 @@ pub const Target = union(enum) {
         return .unavailable;
     }
 };
+
+pub const aarch64 = @import("target/aarch64.zig");
+pub const amdgpu = @import("target/amdgpu.zig");
+pub const arm = @import("target/arm.zig");
+pub const avr = @import("target/avr.zig");
+pub const bpf = @import("target/bpf.zig");
+pub const hexagon = @import("target/hexagon.zig");
+pub const mips = @import("target/mips.zig");
+pub const msp430 = @import("target/msp430.zig");
+pub const nvptx = @import("target/nvptx.zig");
+pub const powerpc = @import("target/powerpc.zig");
+pub const riscv = @import("target/riscv.zig");
+pub const sparc = @import("target/sparc.zig");
+pub const systemz = @import("target/systemz.zig");
+pub const wasm = @import("target/wasm.zig");
+pub const x86 = @import("target/x86.zig");
+
+pub const Feature = struct {
+    name: []const u8,
+    llvm_name: ?[]const u8,
+    description: []const u8,
+
+    dependencies: []*const Feature,
+};
+
+pub const Cpu = struct {
+    name: []const u8,
+    llvm_name: ?[]const u8,
+
+    dependencies: []*const Feature,
+};
+
+pub const TargetDetails = union(enum) {
+    cpu: *const Cpu,
+    features: []*const Feature,
+};
+
+pub fn getFeaturesForArch(arch: @TagType(Target.Arch)) []*const Feature {
+    return switch (arch) {
+        .arm, .armeb, .thumb, .thumbeb => arm.features,
+        .aarch64, .aarch64_be, .aarch64_32 => aarch64.features,
+        .avr => avr.features,
+        .bpfel, .bpfeb => bpf.features,
+        .hexagon => hexagon.features,
+        .mips, .mipsel, .mips64, .mips64el => mips.features,
+        .msp430 => msp430.features,
+        .powerpc, .powerpc64, .powerpc64le => powerpc.features,
+        .amdgcn => amdgpu.features,
+        .riscv32, .riscv64 => riscv.features,
+        .sparc, .sparcv9, .sparcel => sparc.features,
+        .s390x => systemz.features,
+        .i386, .x86_64 => x86.features,
+        .nvptx, .nvptx64 => nvptx.features,
+        .wasm32, .wasm64 => wasm.features,
+
+        else => &[_]*const Feature{},
+    };
+}
+
+pub fn getCpusForArch(arch: @TagType(Target.Arch)) []*const Cpu {
+    return switch (arch) {
+        .arm, .armeb, .thumb, .thumbeb => arm.cpus,
+        .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpus,
+        .avr => avr.cpus,
+        .bpfel, .bpfeb => bpf.cpus,
+        .hexagon => hexagon.cpus,
+        .mips, .mipsel, .mips64, .mips64el => mips.cpus,
+        .msp430 => msp430.cpus,
+        .powerpc, .powerpc64, .powerpc64le => powerpc.cpus,
+        .amdgcn => amdgpu.cpus,
+        .riscv32, .riscv64 => riscv.cpus,
+        .sparc, .sparcv9, .sparcel => sparc.cpus,
+        .s390x => systemz.cpus,
+        .i386, .x86_64 => x86.cpus,
+        .nvptx, .nvptx64 => nvptx.cpus,
+        .wasm32, .wasm64 => wasm.cpus,
+
+        else => &[_]*const Cpu{},
+    };
+}