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CANN 9.1 parallel-gate correction (2026-09-10)
With
SGLANG_NPU_KDA_VERIFY_PARALLEL_GATES=1, four-host target graph capture failed at the beta slice's.reshape(()): Triton-Ascend 3.2 rejects a zero-dimensional block type. An isolated test of the previous heade5859c8reproduced the same compile error with parallel gates enabled; the disabled control passed.This correction extracts scalar beta with a one-element reduction and loads raw gates with flattened addresses before restoring the token/key axes. The second change fixes an independently reproduced numerical error for narrow strided raw gates (K=7, element stride=2) in the original two-dimensional load. Parallel FP32 activation remains inside the KDA kernel. Existing stride/mask behavior, the sequential state updates, and the separate/preactivated paths are retained.
The existing padding test now also covers gamma7, 6 heads, K/V128 and actual NPU graph replay. Replay changes beta inputs and checks output, every snapshot, padding NaNs, disabled snapshot writes, and persistent-state preservation against an independent CPU reference.
Measured validation of d4d0a89: 32 tests passed on A3 Ascend910_9362, CANN9.1, PyTorch2.10.0+cpu, torch_npu2.10.0.post4 and Triton3.2. These include all 3/8-step raw-versus-preactivated cases and all 16-step V-tile32/64 cases, with parallel gates off/on and bounded/unbounded activation. Sixteen passing cases enabled parallel gates. Applicable local pre-commit checks and git diff checks passed.
Known remaining failure: the next case, 16 steps with K/V128, V tile128, unbounded raw gates and parallel gates disabled, fails compilation with UB overflow: 1,583,104 bits required versus 1,572,864 bits available. The previous head e5859c8 reproduces exactly the same failure. This is the chip-local UB compilation limit, not HBM exhaustion. The 55-test suite therefore has 32 passes, 1 failure and 22 unexecuted tests; it is not a complete pass.
A separate working-tile correction is being prepared but is not in this PR head. Its first targeted compilation was externally interrupted by Docker SIGKILL before producing a passing test. Device and full-model validation are paused while other users' jobs run; no other processes will be stopped. Earlier interrupted runs and the current UB failure are retained separately. No full-model all-on acceptance or new performance result is claimed. The reported eager PagedAttentionOperation incident on the other machines also remains unresolved.
This PR retains the K3 DSpark/KDA hot paths and padding correctness changes, and adds an explicit token-vectorized gate experiment for fixed-width KDA verify. It is paired with framework PR31, which defaults to separate FP32 gate activation after the supplied profiles showed a slower original raw-gate specialization.
The branch now incorporates current
a5-k3-0828at1ec11e08ea3999a0f84f8b78fa57f19d59892ca5, including #5 and #11. This supplies the chunk-KDA prefill operator required by PR31's framework base. The new parallel-gate changes are Python/Triton only; deploying the full paired stack still requires a library built with the current base operators.Kernel behavior
kda_target_verify_npu(..., precompute_raw_gates=True)computes FP32 decay and beta over all verify positions before loading the recurrent state. Activation stays inside the same kernel; there is no new global gate buffer or extra kernel launch. State updates and per-position snapshots remain in their original order.cann.extract_slice. Unsupported settings fail explicitly.value_block_size=32/64/128independently selects the V tile; omission retains the original default.-1suppresses snapshot writes independently.Framework selection and A/B
In PR31, before service startup on every rank:
The default for both variables is
0: separate activation and unchanged kernel tiling. The removed legacySGLANG_NPU_FUSED_KDA_VERIFY_GATESframework switch cannot enable the new experiment.The supplied top1 launch configuration had
SGLANG_DSPARK_FOLDED_PROPOSAL=0, preventing construction of the fused sampler. Use folded proposal1, folded sampling0, fused local top11, BF16 W2/base logits and TP sharding; the folded result also requires a greedy batch and draft graph replay. The full settings and profiler signatures are documented inbenchmark/README_kda_parallel_gates.mdand PR31. This optimization changes draft logits communication, not target embedding AllReduce.The benchmark includes gate preparation, warms compilation before graph capture, checks output and every snapshot before/after replay, and records persistent-state preservation, timing samples, software versions, and loaded kernel identity. Larger V tiles can reduce repeated gate work while increasing local-memory pressure. A faster raw-fused result alone is insufficient: compare against the same-run separate-gate baseline, then measure end-to-end acceptance and TPOT.
Evidence and validation
The historical profiles measured 59.559 us/layer for separate gate preparation plus verify and 75.083 us/layer for original raw-fused verify, an observed difference of +15.524 us/layer. The new specialization has no measured NPU performance result yet. These profiles do not prove the cause of the reported 2 ms/token regression, and do not validate the optional top1/ragged/Conv3D paths.
Earlier CPU validation of head e5859c8, before the CANN9.1 correction above:
git diff --checkpassed for relevant changed files.main, not this A5 branch; this update does not broaden that policy.The earlier CPU harness does not compile Triton, execute CANN extensions, or measure graph/UB behavior. The latest CANN9.1 result above includes 32 passing cases and a remaining V-tile128 UB compilation failure. Complete graph replay, full-model acceptance, and performance remain unvalidated.
Before this update, the previous PR3 head
fd4e17drecorded CANN 9.0 target-verify/conv/ragged and four-node padding tests in the PR's earlier validation. Those historical results apply to that head, not to the new parallel specialization or the newly synchronized base. They must not be counted as validation of this update.