drivers: counter: add support for GD32 timer #51955
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cameled
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For the CI failure, commit 7d3fdff should contain a change description block. more commit-guidelines |
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Thank you for notification. |
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cameled
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Some function name need update, others look good for me.
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@nandojve @nordic-krch Please help to review this PR. |
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Hi @soburi , |
RCU_CFG1_TIMERSEK_MSK -> RCU_CFG1_TIMERSEL_MSK Signed-off-by: TOKITA Hiroshi <[email protected]>
DT_COMPAT_GET_ANY_STATUS_OKAY is not suited for the node's existing check. (This macro returns the stem of the DTS macro name, the stem part is not a defined symbol.) Instead, it should use the DT_HAS_COMPAT_STATUS_OKAY macro. Signed-off-by: TOKITA Hiroshi <[email protected]>
The timer_ids contain timers that belong to any bus. So, It should recognize with entire id, not only the CLOCK_ID_BIT part. Signed-off-by: TOKITA Hiroshi <[email protected]>
Adds support for GD32 timer Note: Currently, it is not supporting RISC-V(GD32V) devices. It needs some work on the interrupt controller first. Signed-off-by: TOKITA Hiroshi <[email protected]>
Add line to yaml for supporting counter Signed-off-by: TOKITA Hiroshi <[email protected]>
Add support for boards that implements the GD32 SoCs. Signed-off-by: TOKITA Hiroshi <[email protected]>
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Hi @nandojve |
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drivers/counter/counter_gd32_timer.c
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shouldn't there be (void)? Same as line below?
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Thanks for pointing out.
I fixed it.
drivers/counter/counter_gd32_timer.c
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name of the variable (now) sounds a bit missleading.
Add support for boards that implements the GD32 SoCs. Signed-off-by: TOKITA Hiroshi <[email protected]>
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Adds support for GD32 timer
Note: It not supporting RISC-V(GD32V) device at this time.
It needs some work on the interrupt controller first.
Signed-off-by: TOKITA Hiroshi [email protected]
The first 3 commits fix clock_control_gd32.
ied with the GD32F407-START board. The other boards checked compilation only.