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drivers: watchdog: Add support for the GD32 watchdog timers #41673
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martinjaeger
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Thanks @soburi for this contribution. Good to see the GD32 ecosystem support grow.
Got some rather small change requests and some questions below.
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Hi @soburi , Rebase and squash update commits on the originals. |
nandojve
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Hi @soburi ,
A few comments.
drivers/watchdog/Kconfig.gd32
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I would like know what is the USE_GD32_DBG Kconfig used for?
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USE_GD32_DBG must be enabled to use dbg_periph_enable.
https://github.com/soburi/zephyr/blob/c4b8a0358d2c6b1b6dc1b9636a1f12890f413ced/drivers/watchdog/wdt_fwdgt_gd32.c#L77
https://github.com/soburi/zephyr/blob/c4b8a0358d2c6b1b6dc1b9636a1f12890f413ced/drivers/watchdog/wdt_wwdgt_gd32.c#L94
It is used to stop the watchdog counter at the CPU halted.
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Ok, Is this required in production? or is this only required when debugging board?
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Change to set the register directly not use the vendor provided function, and removing USE_GD32_DBG.
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Just a remind that the USE_GD32_DBG still there.
Note, you can keep it by adding another Kconfig variable to enable it by demand with default as disabled.
drivers/watchdog/wdt_fwdgt_gd32.c
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Try keep short lines always possible, for instance:
uint32_t ticks = (uint64_t)CONFIG_GD32_LOW_SPEED_IRC_FREQUENCY
* timeout / MSEC_PER_SEC;
drivers/watchdog/wdt_fwdgt_gd32.c
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ARG_UNUSED(channel_id);
fwdgt_counter_reload();
return 0;
drivers/watchdog/wdt_fwdgt_gd32.c
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#endif
return ret;
drivers/watchdog/wdt_wwdgt_gd32.c
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wwdgt_enable();
wwdgt_flag_clear();
wwdgt_interrupt_enable();
return 0;
drivers/watchdog/wdt_wwdgt_gd32.c
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wwdgt_config(counter, window, prescaler);
return 0;
drivers/watchdog/wdt_wwdgt_gd32.c
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ARG_UNUSED(channel_id);
wwdgt_counter_update(data->counter);
return 0;
drivers/watchdog/wdt_wwdgt_gd32.c
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wwdgt_flag_clear();
if (data->callback) {
data->callback(dev, 0);
}
samples/drivers/watchdog/src/main.c
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You are doing more than simple add overlay files. I think you should explain better at commit message why you are changing the example or split the changes.
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I got it. Splitting this commit.
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Hi @soburi, you seem to have introduced undefined references to |
Add options about Internal RC(IRC) oscillator. - GD32_HAS_IRC_32K/40K indicates IRC types. - GD32_LOW_SPEED_IRC_FREQUENCY is the numeric value of frequency Signed-off-by: TOKITA Hiroshi <[email protected]>
Add GD32_DBG_SUPPORT options to enable HAL debug functions. Signed-off-by: TOKITA Hiroshi <[email protected]>
Add support for GD32 Free watchdog timer. Signed-off-by: TOKITA Hiroshi <[email protected]>
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Hi, @fkokosinski
Rebase and fix CI failure done. |
gmarull
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one last nitpick, thanks for this work
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nit: resets required true missing
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It is significant issue!
Fixed it.
Add support for GD32 Window watchdog timer. Signed-off-by: TOKITA Hiroshi <[email protected]>
Add watchdog node for GD32 series SoC's dts files. Signed-off-by: TOKITA Hiroshi <[email protected]>
Enable watchdog in each GD32 implemented board. Add the watchdog function as a supported function in each yaml files. Signed-off-by: TOKITA Hiroshi <[email protected]>
Add support for boards that implement GD32 SoC. Overlay file for longan_nano_lite enables FWDGT. Add WDT_FEED_INTERVAL to make adjustable the execution cycle of wdt_feed(). And also, make waiting for the WDT_FEED_INTERVAL period for the watchdog window opens at the start of the test. Signed-off-by: TOKITA Hiroshi <[email protected]>
Enable watchdog tests for boards that implement GD32 SoC. Signed-off-by: TOKITA Hiroshi <[email protected]>
nandojve
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Thank you @soburi !
This PR adds watchdog drivers for GD32.
GD32 has two types of the watchdog timer, such as
This PR adds support for both types of watchdogs.
I verified with Longan Nano Board with GD32VF103.
More GD32 work #38657