Power Management: Namespace cleanups

Kconfig.zephyr

@@ -498,7 +498,7 @@ endchoice
 config BOOTLOADER_CONTEXT_RESTORE
 	bool "Boot loader has context restore support"
 	default y
-	depends on SYS_POWER_DEEP_SLEEP_STATES && BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
+	depends on PM_DEEP_SLEEP_STATES && BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
 	help
 	  This option signifies that the target has a bootloader
 	  that restores CPU context upon resuming from deep sleep

arch/Kconfig

@@ -477,47 +477,6 @@ config ARCH_HAS_THREAD_LOCAL_STORAGE
 config ARCH_HAS_THREAD_ABORT
 	bool
 
-#
-# Hidden PM feature configs which are to be selected by
-# individual SoC.
-#
-
-config HAS_SYS_POWER_STATE_SLEEP_1
-	bool
-	help
-	  This option signifies that the target supports the SYS_POWER_STATE_SLEEP_1
-	  configuration option.
-
-config HAS_SYS_POWER_STATE_SLEEP_2
-	bool
-	help
-	  This option signifies that the target supports the SYS_POWER_STATE_SLEEP_2
-	  configuration option.
-
-config HAS_SYS_POWER_STATE_SLEEP_3
-	bool
-	help
-	  This option signifies that the target supports the SYS_POWER_STATE_SLEEP_3
-	  configuration option.
-
-config HAS_SYS_POWER_STATE_DEEP_SLEEP_1
-	bool
-	help
-	  This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_1
-	  configuration option.
-
-config HAS_SYS_POWER_STATE_DEEP_SLEEP_2
-	bool
-	help
-	  This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_2
-	  configuration option.
-
-config HAS_SYS_POWER_STATE_DEEP_SLEEP_3
-	bool
-	help
-	  This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_3
-	  configuration option.
-
 config BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
 	bool
 	help

arch/arc/core/isr_wrapper.S

@@ -24,8 +24,8 @@
 GTEXT(_isr_wrapper)
 GTEXT(_isr_demux)
 
-#ifdef CONFIG_SYS_POWER_MANAGEMENT
-GTEXT(z_sys_power_save_idle_exit)
+#if defined(CONFIG_PM)
+GTEXT(z_pm_save_idle_exit)
 #endif
 
 /*
@@ -245,18 +245,18 @@ rirq_path:
 
 /* r0, r1, and r3 will be used in exit_tickless_idle macro */
 .macro exit_tickless_idle
-#ifdef CONFIG_SYS_POWER_MANAGEMENT
+#if defined(CONFIG_PM)
 	clri r0 /* do not interrupt exiting tickless idle operations */
 	mov_s r1, _kernel
 	ld_s r3, [r1, _kernel_offset_to_idle] /* requested idle duration */
-	breq r3, 0, _skip_sys_power_save_idle_exit
+	breq r3, 0, _skip_pm_save_idle_exit
 
 	st 0, [r1, _kernel_offset_to_idle] /* zero idle duration */
 	push_s blink
-	jl z_sys_power_save_idle_exit
+	jl z_pm_save_idle_exit
 	pop_s blink
 
-_skip_sys_power_save_idle_exit:
+_skip_pm_save_idle_exit:
 	seti r0
 #endif
 .endm

arch/arc/core/reset.S

@@ -154,9 +154,9 @@ done_mpu_regions_reset:
 #endif
 #endif
 
-#if defined(CONFIG_SYS_POWER_DEEP_SLEEP_STATES) && \
+#if defined(CONFIG_PM_DEEP_SLEEP_STATES) && \
 	!defined(CONFIG_BOOTLOADER_CONTEXT_RESTORE)
-        jl @_sys_resume_from_deep_sleep
+        jl @pm_system_resume_from_deep_sleep
 #endif
 
 #if defined(CONFIG_SMP) || CONFIG_MP_NUM_CPUS  > 1

arch/arm/core/aarch32/irq_manage.c

@@ -27,6 +27,7 @@
 #include <sw_isr_table.h>
 #include <irq.h>
 #include <tracing/tracing.h>
+#include <power/power.h>
 
 extern void z_arm_reserved(void);
 
@@ -161,7 +162,7 @@ void z_irq_spurious(const void *unused)
 	z_arm_fatal_error(K_ERR_SPURIOUS_IRQ, NULL);
 }
 
-#ifdef CONFIG_SYS_POWER_MANAGEMENT
+#ifdef CONFIG_PM
 void _arch_isr_direct_pm(void)
 {
 #if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) \
@@ -184,7 +185,7 @@ void _arch_isr_direct_pm(void)
 		int32_t idle_val = _kernel.idle;
 
 		_kernel.idle = 0;
-		z_sys_power_save_idle_exit(idle_val);
+		z_pm_save_idle_exit(idle_val);
 	}
 
 #if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) \

arch/arm/core/aarch32/isr_wrapper.S

@@ -84,13 +84,13 @@ SECTION_FUNC(TEXT, _isr_wrapper)
 	bl sys_trace_isr_enter
 #endif
 
-#ifdef CONFIG_SYS_POWER_MANAGEMENT
+#ifdef CONFIG_PM
 	/*
 	 * All interrupts are disabled when handling idle wakeup.  For tickless
 	 * idle, this ensures that the calculation and programming of the
 	 * device for the next timer deadline is not interrupted.  For
 	 * non-tickless idle, this ensures that the clearing of the kernel idle
-	 * state is not interrupted.  In each case, z_sys_power_save_idle_exit
+	 * state is not interrupted.  In each case, z_pm_save_idle_exit
 	 * is called with interrupts disabled.
 	 */
 
@@ -115,21 +115,21 @@ SECTION_FUNC(TEXT, _isr_wrapper)
 	movs.n r1, #0
 	/* clear kernel idle state */
 	str r1, [r2, #_kernel_offset_to_idle]
-	bl z_sys_power_save_idle_exit
+	bl z_pm_save_idle_exit
 _idle_state_cleared:
 
 #elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
 	ittt ne
 	movne	r1, #0
 		/* clear kernel idle state */
 		strne	r1, [r2, #_kernel_offset_to_idle]
-		blne	z_sys_power_save_idle_exit
+		blne	z_pm_save_idle_exit
 #elif defined(CONFIG_ARMV7_R)
 	beq _idle_state_cleared
 	movs r1, #0
 	/* clear kernel idle state */
 	str r1, [r2, #_kernel_offset_to_idle]
-	bl z_sys_power_save_idle_exit
+	bl z_pm_save_idle_exit
 _idle_state_cleared:
 #else
 #error Unknown ARM architecture
@@ -139,7 +139,7 @@ _idle_state_cleared:
 	cpsie i		/* re-enable interrupts (PRIMASK = 0) */
 #endif
 
-#endif /* CONFIG_SYS_POWER_MANAGEMENT */
+#endif /* CONFIG_PM */
 
 #if defined(CONFIG_CPU_CORTEX_M)
 	mrs r0, IPSR	/* get exception number */

arch/posix/core/cpuhalt.c

@@ -11,7 +11,7 @@
  *
  * An implementation of the architecture-specific
  * arch_cpu_idle() primitive required by the kernel idle loop component.
- * It can be called within an implementation of _sys_power_save_idle(),
+ * It can be called within an implementation of _pm_save_idle(),
  * which is provided for the kernel by the platform.
  *
  * An implementation of arch_cpu_atomic_idle(), which

arch/posix/core/swap.c

@@ -18,6 +18,7 @@
 #include "posix_core.h"
 #include "irq.h"
 #include "kswap.h"
+#include <power/power.h>
 
 int arch_swap(unsigned int key)
 {
@@ -103,7 +104,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, char *stack_ptr,
 } /* LCOV_EXCL_LINE */
 #endif
 
-#ifdef CONFIG_SYS_POWER_MANAGEMENT
+#ifdef CONFIG_PM
 /**
  * If the kernel is in idle mode, take it out
  */
@@ -113,7 +114,7 @@ void posix_irq_check_idle_exit(void)
 		int32_t idle_val = _kernel.idle;
 
 		_kernel.idle = 0;
-		z_sys_power_save_idle_exit(idle_val);
+		z_pm_save_idle_exit(idle_val);
 	}
 }
 #endif

arch/x86/core/ia32/crt0.S

@@ -37,8 +37,8 @@
 	GDATA(_sse_mxcsr_default_value)
 #endif
 
-#ifdef CONFIG_SYS_POWER_DEEP_SLEEP_STATES
-	GTEXT(_sys_resume_from_deep_sleep)
+#ifdef CONFIG_PM_DEEP_SLEEP_STATES
+	GTEXT(pm_system_resume_from_deep_sleep)
 #endif
 
 SECTION_FUNC(TEXT_START, __start)
@@ -134,13 +134,13 @@ __csSet:
 	 * the ISR stack size are some multiple of ARCH_STACK_PTR_ALIGN, which
 	 * is at least 4.
 	 *
-	 * This is also used to call the _sys_resume_from_deep_sleep()
+	 * This is also used to call the pm_system_resume_from_deep_sleep()
 	 * routine to avoid memory corruption if the system is resuming from
-	 * deep sleep. It is important that _sys_resume_from_deep_sleep()
+	 * deep sleep. It is important that pm_system_resume_from_deep_sleep()
 	 * restores the stack pointer to what it was at deep sleep before
          * enabling interrupts.  This is necessary to avoid
 	 * interfering with interrupt handler use of this stack.
-	 * If it is a cold boot then _sys_resume_from_deep_sleep() should
+	 * If it is a cold boot then pm_system_resume_from_deep_sleep() should
 	 * not do anything and must return immediately.
 	 */
 #ifdef CONFIG_INIT_STACKS
@@ -163,10 +163,10 @@ __csSet:
 #else
 	addl	$CONFIG_ISR_STACK_SIZE, %esp
 #endif
-#if defined(CONFIG_SYS_POWER_DEEP_SLEEP_STATES) && \
+#if defined(CONFIG_PM_DEEP_SLEEP_STATES) && \
              !defined(CONFIG_BOOTLOADER_CONTEXT_RESTORE)
 	/*
-	 * Invoke _sys_resume_from_deep_sleep() hook to handle resume from
+	 * Invoke pm_system_resume_from_deep_sleep() hook to handle resume from
 	 * deep sleep. It should first check whether system is recovering from
 	 * deep sleep state. If it is, then this function should restore
 	 * states and resume at the point system went to deep sleep.
@@ -177,7 +177,7 @@ __csSet:
 	 * return and execution falls through to cold boot path.
 	 */
 
-	call _sys_resume_from_deep_sleep
+	call pm_system_resume_from_deep_sleep
 
 #endif
 

arch/x86/core/ia32/intstub.S

@@ -31,8 +31,8 @@
 
 	GTEXT(arch_swap)
 
-#ifdef CONFIG_SYS_POWER_MANAGEMENT
-	GTEXT(z_sys_power_save_idle_exit)
+#ifdef CONFIG_PM
+	GTEXT(z_pm_save_idle_exit)
 #endif
 
 /**
@@ -144,11 +144,11 @@ SECTION_FUNC(TEXT, _interrupt_enter)
 
 	pushl	%edi			/* Save stack pointer */
 
-#ifdef CONFIG_SYS_POWER_MANAGEMENT
+#ifdef CONFIG_PM
 	cmpl	$0, _kernel_offset_to_idle(%ecx)
 	jne	handle_idle
 	/* fast path is !idle, in the pipeline */
-#endif /* CONFIG_SYS_POWER_MANAGEMENT */
+#endif /* CONFIG_PM */
 
 	/* fall through to nested case */
 
@@ -297,29 +297,29 @@ nestedInterrupt:
 	KPTI_IRET
 
 
-#ifdef CONFIG_SYS_POWER_MANAGEMENT
+#ifdef CONFIG_PM
 handle_idle:
 	pushl	%eax
 	pushl	%edx
-	/* Populate 'ticks' argument to z_sys_power_save_idle_exit */
+	/* Populate 'ticks' argument to z_pm_save_idle_exit */
 	push	_kernel_offset_to_idle(%ecx)
 	/* Zero out _kernel.idle */
 	movl	$0, _kernel_offset_to_idle(%ecx)
 
 	/*
-	 * Beware that a timer driver's z_sys_power_save_idle_exit() implementation might
+	 * Beware that a timer driver's z_pm_save_idle_exit() implementation might
 	 * expect that interrupts are disabled when invoked.  This ensures that
 	 * the calculation and programming of the device for the next timer
 	 * deadline is not interrupted.
 	 */
 
-	call	z_sys_power_save_idle_exit
+	call	z_pm_save_idle_exit
 	/* discard 'ticks' argument passed on the stack */
 	add	$0x4, %esp
 	popl	%edx
 	popl	%eax
 	jmp	alreadyOnIntStack
-#endif /* CONFIG_SYS_POWER_MANAGEMENT */
+#endif /* CONFIG_PM */
 
 /**
  *

boards/arm/cc1352r1_launchxl/Kconfig.defconfig

@@ -8,12 +8,12 @@ if BOARD_CC1352R1_LAUNCHXL
 config BOARD
 	default "cc1352r1_launchxl"
 
-if SYS_POWER_MANAGEMENT
+if PM
 
 # Ideally this value could be made to less than 1 ms, as there is
 # essentially no delay to come out of IDLE mode. However Zephyr only
 # supports millisecond precision here, so 1 ms is the best approximation.
-config SYS_PM_MIN_RESIDENCY_SLEEP_1
+config PM_MIN_RESIDENCY_SLEEP_1
 	default 1
 
 # The default here is deliberately made higher to be less agressive, to
@@ -25,8 +25,8 @@ config SYS_PM_MIN_RESIDENCY_SLEEP_1
 # given application, weighing tradeoffs between a lower value that leads to
 # higher power savings vs. a higher value that would accommodate for a higher
 # wakeup latency.
-config SYS_PM_MIN_RESIDENCY_SLEEP_2
+config PM_MIN_RESIDENCY_SLEEP_2
 	default 5
 
-endif # SYS_POWER_MANAGEMENT
+endif # PM
 endif # BOARD_CC1352R1_LAUNCHXL

boards/arm/cc1352r1_launchxl/doc/index.rst

@@ -205,11 +205,11 @@ Power Management and UART
 
 System and device power management are supported on this platform, and
 can be enabled via the standard Kconfig options in Zephyr, such as
-:option:`CONFIG_SYS_POWER_MANAGEMENT`, :option:`CONFIG_DEVICE_POWER_MANAGEMENT`,
-:option:`CONFIG_SYS_POWER_SLEEP_STATES`, and
-:option:`CONFIG_SYS_POWER_DEEP_SLEEP_STATES`.
+:option:`CONFIG_PM`, :option:`CONFIG_PM_DEVICE`,
+:option:`CONFIG_PM_SLEEP_STATES`, and
+:option:`CONFIG_PM_DEEP_SLEEP_STATES`.
 
-When system power management is turned on (CONFIG_SYS_POWER_MANAGEMENT=y),
+When system power management is turned on (CONFIG_PM=y),
 sleep state 2 (standby mode) is allowed, and polling is used to retrieve input
 by calling uart_poll_in(), it is possible for characters to be missed if the
 system enters standby mode between calls to uart_poll_in(). This is because
@@ -218,9 +218,9 @@ disable sleep state 2 while polling:
 
 .. code-block:: c
 
-    sys_pm_ctrl_disable_state(SYS_POWER_STATE_SLEEP_2);
+    pm_ctrl_disable_state(POWER_STATE_SLEEP_2);
     <code that calls uart_poll_in() and expects input at any point in time>
-    sys_pm_ctrl_enable_state(SYS_POWER_STATE_SLEEP_2);
+    pm_ctrl_enable_state(POWER_STATE_SLEEP_2);
 
 
 References