Skip to content

Support flexspi nand on frdm rw612#104870

Merged
henrikbrixandersen merged 7 commits intozephyrproject-rtos:mainfrom
nxp-upstream:support-flexspi-nand-on-frdm-rw612
Apr 22, 2026
Merged

Support flexspi nand on frdm rw612#104870
henrikbrixandersen merged 7 commits intozephyrproject-rtos:mainfrom
nxp-upstream:support-flexspi-nand-on-frdm-rw612

Conversation

@SuperHeroAbner
Copy link
Copy Markdown
Contributor

@SuperHeroAbner SuperHeroAbner commented Mar 4, 2026

Add a ONFI-compatible NAND flash driver for NXP FlexSPI controller on FRDM-RW612. Replaced the on-board PSRAM with the W25N01GV NAND.
NFTL RFC is merged #50795.

Build NAND littlefs sample with command:
west build -p always -b frdm_rw612 samples/subsys/fs/littlefs -- -DEXTRA_CONF_FILE="boards/frdm_rw612_nand.conf" -DEXTRA_DTC_OVERLAY_FILE="boards/frdm_rw612_nand.overlay"

@butok
Copy link
Copy Markdown
Contributor

butok commented Mar 4, 2026

Do we have NXP boards with a NAND flash, to avoid board HW modifications?

@NeilChen93 NeilChen93 self-requested a review March 4, 2026 08:19
@SuperHeroAbner
Copy link
Copy Markdown
Contributor Author

Hi @butok , this is requirement from customer. RW612+W25N01 is the expected combination

@SuperHeroAbner SuperHeroAbner force-pushed the support-flexspi-nand-on-frdm-rw612 branch from fd206e9 to 6045654 Compare March 10, 2026 08:00
@github-actions
Copy link
Copy Markdown

github-actions Bot commented Mar 10, 2026

The following west manifest projects have changed revision in this Pull Request:

Name Old Revision New Revision Diff

All manifest checks OK

Note: This message is automatically posted and updated by the Manifest GitHub Action.

@github-actions github-actions Bot added manifest manifest-dhara DNM (manifest) This PR should not be merged (controlled by action-manifest) labels Mar 10, 2026
@butok butok requested review from hakehuang and removed request for Derek-RTK and MaochenWang1 March 20, 2026 12:10
@butok
Copy link
Copy Markdown
Contributor

butok commented Mar 20, 2026

Hi @kartben
I have noticed that GitHub, when adding a new reviewer, automatically deletes some of the current reviewers.
Does Zephyr have a limit on the number of PR reviewers?

@kartben
Copy link
Copy Markdown
Member

kartben commented Mar 20, 2026

Hi @kartben
I have noticed that GitHub, when adding a new reviewer, automatically deletes some of the current reviewers.
Does Zephyr have a limit on the number of PR reviewers?

I think it's just a GitHub limit

@butok
Copy link
Copy Markdown
Contributor

butok commented Mar 20, 2026

Hi @kartben
I have noticed that GitHub, when adding a new reviewer, automatically deletes some of the current reviewers.
Does Zephyr have a limit on the number of PR reviewers?

I think it's just a GitHub limit

OK, it means the limit is 15.
But GitHub does not apply this limit during PR creation, so by adding 1 new reviewer, it removes 16 old ones.

Copy link
Copy Markdown
Contributor

@zejiang0jason zejiang0jason left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

the last two commits in this PR can be merged into the commits which create the files.

Comment thread samples/subsys/fs/littlefs/src/main.c Outdated
Comment thread dts/bindings/mtd/nxp,imx-flexspi-nand.yaml
Comment thread drivers/flash/flash_mcux_flexspi_nand.c
Comment thread drivers/flash/flash_mcux_flexspi_nand.c Outdated
Comment thread drivers/flash/flash_mcux_flexspi_nand.c Outdated
Comment thread drivers/memc/memc_mcux_flexspi.c Outdated
Add device tree binding for ONFI-compatible NAND flash devices connected
to NXP FlexSPI controllers. The binding extends the base FlexSPI device
binding and includes soc-nv-flash.yaml to inherit the write-block-size
and erase-block-size properties. Device geometry (page size, pages per
block, total capacity) is probed at runtime from the ONFI parameter page.

Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
@SuperHeroAbner
Copy link
Copy Markdown
Contributor Author

@ofirshe Hi your recent commit update the dts. However, samples/drivers/memc/boards/frdm_rw612.overlay was not updated accordingly, it still sets spi-max-frequency on &w25q512jvfiq, which now points to the soc-nv-flash child node. Since soc-nv-flash.yaml does not declare spi-max-frequency, the DTS validation fails.
The fix should be changing &w25q512jvfiq to &ext_flash_ctrl in that overlay. I can help to fix it. Can you confirm that there are no other similar issues?

Comment thread samples/subsys/fs/littlefs/src/main.c Outdated
Comment thread drivers/memc/memc_mcux_flexspi.c
@zejiang0jason
Copy link
Copy Markdown
Contributor

self assigned, this is NXP driver, thanks.

Comment thread drivers/flash/flash_mcux_flexspi_nand.c Outdated
Comment thread drivers/flash/flash_mcux_flexspi_nand.c Outdated
Comment thread drivers/flash/flash_mcux_flexspi_nand.c
Comment thread drivers/flash/flash_mcux_flexspi_nand.c
Add memc_flexspi_apply_pinctrl() for configuring additional FlexSPI
port pins when init is skipped due to XIP, and memc_flexspi_update_lut()
for runtime LUT updates using a stack buffer to avoid XIP pointer
rejection.

Guard all irq_lock() calls with CONFIG_FLASH_MCUX_FLEXSPI_XIP so
non-XIP systems do not incur unnecessary interrupt latency.

Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
Add a SPI-NAND flash driver for NXP FlexSPI controller. The driver
probes device geometry (page size, OOB size, pages per block, total
capacity) from the ONFI parameter page at runtime and supports read,
write, and block erase operations. Bad-block detection and marking
are exposed through the flash_ex_op interface, including the
FLASH_EX_OP_IS_BAD_BLOCK and FLASH_EX_OP_MARK_BAD_BLOCK operations.

Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
Add Winbond W25N01GV (1 Gbit SPI NAND) device node to the FRDM-RW612
common DTS on FlexSPI PortB1 (CS2), disabled by default. The node is
pin-compatible with the aps6404l PSRAM footprint at U12; enable at most
one via devicetree overlay. write-block-size and erase-block-size are
set to match the W25N01GV page and block geometry.

Add pinctrl entry for FlexSPI PortB1 PSRAM/NAND pins and document the
optional board rework procedure in the board documentation.

Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
Add configuration option and implementation for using an FTL (Flash
Translation Layer) block device as storage backend for the littlefs
sample, enabling the sample to run on NAND flash through the Dhara FTL
disk driver.

Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
Add a build-only twister scenario for the W25N01GV NAND flash on
FRDM-RW612, exercising LittleFS over Dhara FTL over FlexSPI NAND.
The scenario is marked build_only: true as CI does not have hardware
with NAND soldered.

Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
After commit b1afb49 ("flash: nxp: align FlexSPI NOR DTS with
soc-nv-flash layout"), the w25q512jvfiq label points to the soc-nv-flash
child node instead of the nxp,imx-flexspi-nor controller. Setting
spi-max-frequency on &w25q512jvfiq causes a devicetree validation error
because soc-nv-flash.yaml does not declare this property.

Fix by referencing &ext_flash_ctrl (the flash controller node) instead.

Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
@sonarqubecloud
Copy link
Copy Markdown

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Projects

None yet

Development

Successfully merging this pull request may close these issues.

9 participants