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Releases: zeeshanrafique23/RV32I-Logisim

v1.0

25 Sep 12:58
@zeeshanrafique23 zeeshanrafique23
v1.0
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This is the stable version of RISC-V 32-bit base Integer ISA circuit implementation on Logisim. This implementation can help the beginners of RISC-V to get started. The circuit includes

  • PC
  • Register File
  • ALU
  • ALU Control
  • Control Unit
  • Immediate generation
  • Memories (data and inst)

riscv-top

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