[Feature][MRV2] expand default MRv2 architecture whitelist and add dspark

[yjyang62]

What this PR does / why we need it?

Stacked on vllm-project#16203.

vllm-project#16203 introduces Ascend-owned default Model Runner V2 selection in vllm_ascend/mrv2_utils.py (model + feature whitelists, env override, upstream validation no-op). This PR expands that default path to more production models and dspark, and adjusts related platform / spec-decode / CI coverage so default-V2 stays safe on NPU.

Scope (范围)

• Default-V2 model whitelist (DEFAULT_V2_MODEL_RUNNER_ARCHITECTURES in vllm_ascend/mrv2_utils.py): add Qwen3MoeForCausalLM, MiniMaxM2ForCausalLM, DeepseekV3ForCausalLM, DeepseekV32ForCausalLM, GlmMoeDsaForCausalLM, DeepseekV4ForCausalLM, and Qwen3_5MoeForCausalLM on top of [Misc][MRv2]enable model runner v2 by default via whitelists vllm-project/vllm-ascend#16203’s Qwen3ForCausalLM.
• Explicit default-V1 model exclusion: Qwen3_5ForConditionalGeneration (Qwen3.5/3.6 dense and VL hybrid) is not on the whitelist. It stays on V1 by default because MRv2 hits hybrid VL encoder-graph capture and hybrid KV copy-with-prefix-cache paths that are not ready for default enablement.
• Default-V2 feature whitelist: add static dspark alongside eagle3 / mtp / dflash. Still default V1 when LoRA is enabled, when num_speculative_tokens_per_batch_size (dynamic spec decode) is set, or when DSpark KV sliding window (additional_config.draft_window_size) is set.
• Hybrid on whitelist: for architectures in the list above, is_hybrid=True does not force V1 (e.g. Qwen3_5MoeForCausalLM). Attention-free models and non-generate runner types (except runner_type="draft", which inherits the target’s V2 decision) remain V1.
• Spec-decode / worker alignment: keep MTP draft workers on the same default MRv2 path as the target model; blacklist DSpark sliding window from default V2; pin selected e2e cases that still require V1 (EPLB V1-only paths, p-eagle parallel drafting, SFA V1 precision, test_dflash2_acceptance PIECEWISE after [Revert] Revert "[Feature][MRV1][MRV2] Refactor Host-Side Parameter Updates for ACL Graph Replay." (#16425) vllm-project/vllm-ascend#16726, and similar) via VLLM_USE_V2_MODEL_RUNNER=0 while moving validated nightly cases to V2 where appropriate.
• CI / tooling: extend tests/ut/test_mrv2_utils.py; refresh or pin e2e goldens for default-V2 behavior; nightly DeepSeek-V4 Flash GPQA uses reasoning_effort: low in aisbench config ([CI] Pin DeepSeek-V4 Flash GPQA nightly to low reasoning effort vllm-project/vllm-ascend#16721).

Out of scope for the whitelist change itself: general MRv2 feature development on main that is not required to land the expanded defaults (reviewers should still treat this branch as stacked on vllm-project#16203 for the core gating logic).

MRv2 switching scheme (切换方案)

Decision order in use_v2_model_runner() (vllm_ascend/mrv2_utils.py), installed on VllmConfig by apply_v2_model_runner_config_patch() (vllm-project#16203):

1. Env override (highest priority): if VLLM_USE_V2_MODEL_RUNNER is 0 or 1, use that value (explicit opt-out or opt-in for any model/feature).
2. Model gate: default V2 only when is_default_v2_model_runner_model() is true:
   • runner_type == "generate" and architecture ∈ whitelist, or runner_type == "draft" (inherit target whitelist; do not re-check draft architecture).
   • Reject: is_attention_free, embedding/other non-generate runners, architectures not in the whitelist (including Qwen3_5ForConditionalGeneration).
3. Feature gate: _v2_model_runner_environment_ready() requires is_supported_v2_model_runner_feature():
   • Allow: no speculative config, or method ∈ {eagle3, mtp, dflash, dspark} without the exclusions below.
   • Deny (stay V1): LoRA; num_speculative_tokens_per_batch_size; DSpark with draft_window_size; any other speculative method.
4. Platform gate: not Ascend 310P; HAS_TRITON must be true.
5. Otherwise: default Model Runner V1.

Default-V2 model architectures

• Qwen3ForCausalLM
• Qwen3MoeForCausalLM
• MiniMaxM2ForCausalLM
• DeepseekV3ForCausalLM
• DeepseekV32ForCausalLM
• GlmMoeDsaForCausalLM
• DeepseekV4ForCausalLM
• Qwen3_5MoeForCausalLM

Default-V2 speculative methods: eagle3, mtp, dflash, dspark (subject to the feature exclusions above).

Does this PR introduce any user-facing change?

Yes. The architectures above now default to Model Runner V2 on A2/A3/A5 when Triton is present, the platform is not 310P, and the feature whitelist passes. Whitelisted hybrid variants (for example Qwen3.5 MoE) also default to V2; Qwen3_5ForConditionalGeneration dense/VL stays on V1. LoRA, dynamic speculative decoding, and DSpark sliding window stay on V1 unless VLLM_USE_V2_MODEL_RUNNER=1. All other models remain V1 by default. Explicit VLLM_USE_V2_MODEL_RUNNER=0/1 behavior is unchanged.

How was this patch tested?

• Unit tests added/updated:

  • tests/ut/test_mrv2_utils.py (expanded architecture list, hybrid whitelisted models, Qwen3_5ForConditionalGeneration excluded, dspark and DSpark sliding-window / LoRA / dynamic-spec gates, draft runner inheritance)
  • tests/ut/tools/test_aisbench.py (reasoning_effort passthrough) where included on this branch

• E2e: selective VLLM_USE_V2_MODEL_RUNNER pins and updated goldens for default-V2 paths; test_dflash2_v2_acceptance still exercises V2 eager while test_dflash2_acceptance stays on V1 for PIECEWISE ACL graph.

• CI: cpu-ut / NPU e2e on this PR.

• vLLM main: vllm-project/vllm@84030bb