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LAYGO - LAYout with Gridded Objects

Laygo is an add-on to BAG2 framework for layout generation, written by Jaeduk Han, Woorham Bae, Zhongkai Wang, and Eric Jan. The physical design of analog and mixed-signal (AMS) circuits is very challenging in advanced CMOS processes, due to their complex design rules. Laygo abstracts the design rules by introducing quantized templates and grids. With Laygo, the AMS layout is constructed by placing templates and routing wires on grids; designers don't need to deal with complex design rules. Using Laygo, you can script your layout construction process in Python, which gives higher productivity and process portability over multiple technology nodes.

laygo

Installation and Quick Start

  1. Install BAG2 (skip if you are using the GDS flow)

  2. Clone laygo repo

    $ git clone [email protected]:ucb-art/laygo.git
    
  3. Prepare setup files for your technology.

    Example setup files for generic technologies are released for reference, which can be found here:

     * [cds_ff_mpt]([email protected]:ucb-art/BAG2_cds_ff_mpt.git)
     * [NCSU FreePDK45]([email protected]:ucb-art/BAG2_freePDK45.git)
    

    For BWRC users, default setup files for various technologies are provided under proper NDAs.

  4. Let's run a toy example. Launch ipython and run the GDS tutorial script quick_start_GDS.py.

    $ start_bag.sh    (or ipython)
    > cd laygo
    > run quick_start_GDS.py
    

    It will create a nand gate layout and save the layout to output.gds.

    qs_nand

    KLayout was used for the gds display. Detailed explanations on the tutorial script are here. You can also export the layout to the BAG framework. Refer to this document for details.

  5. For more practice examples, go over lab materials in labs/. Detailed instructions can be found in lab readme.

  6. More generator examples are being uploaded in https://ucb-art.github.io/laygo/ for reference.

Documentations

Documents are stored in https://ucb-art.github.io/laygo/.

Example Labs

Various lab modules are provided to guide the layout generation procedure. Users are strongly recommended to finish all lab modules before working on their designs. Labs modules can be found here

Example Generators

Example generaters can be found here.

License

This project is licensed under the BSD License - check the LICENSE file for details.

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