WDT Final (#70)

* finished watchdog enable/disable

* fixing format issue

* Removing todo comments

src/scu.rs

@@ -1,4 +1,4 @@
-use crate::device::{SCU_GENERAL, SCU_POWER, SCU_RESET};
+use crate::device::{SCU_CLK, SCU_GENERAL, SCU_POWER, SCU_RESET};
 /// PDIV for main PLL
 const PLL_PDIV_XTAL_8MHZ: u32 = 1;
 
@@ -129,6 +129,19 @@ pub enum Clock {
     Wdt,
 }
 
+impl From<Clock> for u32 {
+    fn from(bits: Clock) -> Self {
+        match bits {
+            Clock::Usb => 0x01,
+            Clock::Mmc => 0x02,
+            Clock::Eth => 0x04,
+            Clock::Ebu => 0x08,
+            Clock::Ccu => 0x10,
+            Clock::Wdt => 0x20,
+        }
+    }
+}
+
 #[cfg(not(feature = "xmc4500"))]
 pub enum PeripheralClock {
     Vadc,
@@ -368,6 +381,45 @@ impl Scu {
     pub fn set_boot_mode(&self, mode: BootMode) {
         set_field!(SCU_GENERAL, stcon, swcon, u8::from(mode));
     }
+
+    /// Enable a specific clock in the Scu peripheral
+    pub fn enable_clock(&self, clock: Clock) {
+        set_reg!(SCU_CLK, clkset, u32::from(clock));
+    }
+
+    /// Disable a specific clock in the Scu peripheral
+    pub fn disable_clock(&self, clock: Clock) {
+        set_reg!(SCU_CLK, clkclr, u32::from(clock));
+    }
+
+    /// Check if a peripheral clock is enabled.
+    pub fn is_clock_enabled(&self, clock: Clock) -> bool {
+        return (get_reg!(SCU_CLK, clkstat) & u32::from(clock)) > 0;
+    }
+
+    pub fn gate_peripheral_clock(&self, clock: PeripheralClock) {}
+
+    pub fn ungate_peripheral_clock(&self, clock: PeripheralClock) {}
+
+    // TODO: Update assert_peripheral_reset to const fn once stable
+    pub fn assert_peripheral_reset(&self, peripheral: PeripheralReset) {
+        match peripheral {
+            PeripheralReset::Wdt => {
+                set!(SCU_RESET, prset2, wdtrs);
+            }
+            _ => unimplemented!(),
+        };
+    }
+
+    // TODO: Update deassert_peripheral_reset to const fn once stable
+    pub fn deassert_peripheral_reset(&self, peripheral: PeripheralReset) {
+        match peripheral {
+            PeripheralReset::Wdt => {
+                set!(SCU_RESET, prclr2, wdtrs);
+            }
+            _ => unimplemented!(),
+        };
+    }
 }
 
 #[cfg(test)]

src/wdt.rs

@@ -2,13 +2,15 @@
 
 use crate::device::wdt::RegisterBlock;
 use crate::device::WDT;
+use crate::scu::{Clock, PeripheralClock, PeripheralReset, Scu};
 
 const ALARM_CLEAR: u32 = 2;
 
 const SERVICE_KEY: u32 = 0xABAD_CAFE;
 
 pub struct Wdt {
     wdt: *const RegisterBlock,
+    scu: Scu,
 }
 
 // Todo: Verify the values of the enum
@@ -54,26 +56,27 @@ pub enum Status {
 }
 
 impl Wdt {
-    pub fn new() -> Wdt {
+    pub fn new(scu: Scu) -> Wdt {
         // Haven't resolved yet fully how i want to deal with this.
         // Need to do more reading.
-        let w = Wdt { wdt: WDT::ptr() };
+        let w = Wdt {
+            wdt: WDT::ptr(),
+            scu,
+        };
         w.enable();
         w
     }
 
-    // TODO [#66]: Implement Scu API's for watchdog enable
     pub fn enable(&self) {
-        //Scu Clock enable_clock()
-        //Scu Clock ungate_peripheral_clock
-        //Scu Clock deassert_peripheral_reset
+        self.scu.enable_clock(Clock::Wdt);
+        self.scu.ungate_peripheral_clock(PeripheralClock::Wdt);
+        self.scu.deassert_peripheral_reset(PeripheralReset::Wdt);
     }
 
-    // TODO Implement Scu API's for watchdog disable
     pub fn disable(&self) {
-        //Scu Clock assert_peripheral_reset
-        //Scu Clock gate_peripheral_clock
-        //Scu Clock disable_clock()
+        self.scu.assert_peripheral_reset(PeripheralReset::Wdt);
+        self.scu.gate_peripheral_clock(PeripheralClock::Wdt);
+        self.scu.disable_clock(Clock::Wdt);
     }
 
     pub fn set_window_bounds(self, lower: u32, upper: u32) {