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dialects: (riscv_snitch) Add f32 mul, add, pack from Snitch packed SIMD extension #2872

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merged 5 commits into from
Jul 10, 2024

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nazavode
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@nazavode nazavode commented Jul 9, 2024

This PR adds a small set of operations to riscv_snitch directly mapping on top of the Snitch custom packed SIMD ISA. Further ops are going to need operand constraints to be correctly register allocated.

@nazavode nazavode changed the title dialects: (riscv_snitch) Add mul, add, pack from Snitch packed SIMD extension dialects: (riscv_snitch) Add f32 mul, add, pack from Snitch packed SIMD extension Jul 9, 2024
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codecov bot commented Jul 9, 2024

Codecov Report

All modified and coverable lines are covered by tests ✅

Project coverage is 89.86%. Comparing base (600afaa) to head (601b207).
Report is 4 commits behind head on main.

Additional details and impacted files
@@           Coverage Diff            @@
##             main    #2872    +/-   ##
========================================
  Coverage   89.86%   89.86%            
========================================
  Files         396      397     +1     
  Lines       49829    49976   +147     
  Branches     7683     7716    +33     
========================================
+ Hits        44780    44913   +133     
- Misses       3838     3846     +8     
- Partials     1211     1217     +6     

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@AntonLydike AntonLydike left a comment

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Nice work! Just one nitpick about the use of CHECK-LABEL

tests/filecheck/dialects/riscv_snitch/ops.mlir Outdated Show resolved Hide resolved
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@superlopuh superlopuh left a comment

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could you please add assembly printing tests?

@superlopuh superlopuh added the dialects Changes on the dialects label Jul 10, 2024
@nazavode nazavode merged commit 987abb5 into main Jul 10, 2024
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@nazavode nazavode deleted the nazavode/riscv-snitch-f32-simd branch July 10, 2024 15:32
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3 participants