Add support for most Wasm `simd` instructions to the `wasmi` crate #1421

Robbepop · 2025-03-24T11:47:35Z

Implemented Wasm simd proposal instructions in this PR:

This does not implement support for the following SIMD instructions:

replace_lane instructions
load instructions
store instructions
comparison instructions

➡️: means that this instructions is going to be implemented in a follow-up PR.

Status	Wasm `simd` Instruction
✅	`v128.const(imm: ImmByte[16]) -> v128`
✅	`i8x16.splat(x: i32) -> v128`
✅	`i16x8.splat(x: i32) -> v128`
✅	`i32x4.splat(x: i32) -> v128`
✅	`i64x2.splat(x: i64) -> v128`
✅	`f32x4.splat(x: f32) -> v128`
✅	`f64x2.splat(x: f64) -> v128`

✅	`i8x16.extract_lane_s(a: v128, imm: ImmLaneIdx16) -> i32`
✅	`i8x16.extract_lane_u(a: v128, imm: ImmLaneIdx16) -> i32`
✅	`i16x8.extract_lane_s(a: v128, imm: ImmLaneIdx8) -> i32`
✅	`i16x8.extract_lane_u(a: v128, imm: ImmLaneIdx8) -> i32`
✅	`i32x4.extract_lane(a: v128, imm: ImmLaneIdx4) -> i32`
✅	`i64x2.extract_lane(a: v128, imm: ImmLaneIdx2) -> i64`
✅	`f32x4.extract_lane(a: v128, imm: ImmLaneIdx4) -> f32`
✅	`f64x2.extract_lane(a: v128, imm: ImmLaneIdx2) -> f64`
➡️	`i8x16.replace_lane(a: v128, imm: ImmLaneIdx16, x: i32) -> v128`
➡️	`i16x8.replace_lane(a: v128, imm: ImmLaneIdx8, x: i32) -> v128`
➡️	`i32x4.replace_lane(a: v128, imm: ImmLaneIdx4, x: i32) -> v128`
➡️	`i64x2.replace_lane(a: v128, imm: ImmLaneIdx2, x: i64) -> v128`
➡️	`f32x4.replace_lane(a: v128, imm: ImmLaneIdx4, x: f32) -> v128`
➡️	`f64x2.replace_lane(a: v128, imm: ImmLaneIdx2, x: f64) -> v128`

✅	`i8x16.shuffle(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128`
✅	`i8x16.swizzle(a: v128, s: v128) -> v128`

✅	`i8x16.add(a: v128, b: v128) -> v128`
✅	`i16x8.add(a: v128, b: v128) -> v128`
✅	`i32x4.add(a: v128, b: v128) -> v128`
✅	`i64x2.add(a: v128, b: v128) -> v128`
✅	`i8x16.sub(a: v128, b: v128) -> v128`
✅	`i16x8.sub(a: v128, b: v128) -> v128`
✅	`i32x4.sub(a: v128, b: v128) -> v128`
✅	`i64x2.sub(a: v128, b: v128) -> v128`
✅	`i16x8.mul(a: v128, b: v128) -> v128`
✅	`i32x4.mul(a: v128, b: v128) -> v128`
✅	`i64x2.mul(a: v128, b: v128) -> v128`
✅	`i32x4.dot_i16x8_s(a: v128, b: v128) -> v128`
✅	`i8x16.neg(a: v128) -> v128`
✅	`i16x8.neg(a: v128) -> v128`
✅	`i32x4.neg(a: v128) -> v128`
✅	`i64x2.neg(a: v128) -> v128`

✅	`i16x8.extmul_low_i8x16_s(a: v128, b: v128) -> v128`
✅	`i16x8.extmul_high_i8x16_s(a: v128, b: v128) -> v128`
✅	`i16x8.extmul_low_i8x16_u(a: v128, b: v128) -> v128`
✅	`i16x8.extmul_high_i8x16_u(a: v128, b: v128) -> v128`
✅	`i32x4.extmul_low_i16x8_s(a: v128, b: v128) -> v128`
✅	`i32x4.extmul_high_i16x8_s(a: v128, b: v128) -> v128`
✅	`i32x4.extmul_low_i16x8_u(a: v128, b: v128) -> v128`
✅	`i32x4.extmul_high_i16x8_u(a: v128, b: v128) -> v128`
✅	`i64x2.extmul_low_i32x4_s(a: v128, b: v128) -> v128`
✅	`i64x2.extmul_high_i32x4_s(a: v128, b: v128) -> v128`
✅	`i64x2.extmul_low_i32x4_u(a: v128, b: v128) -> v128`
✅	`i64x2.extmul_high_i32x4_u(a: v128, b: v128) -> v128`
✅	`i16x8.extadd_pairwise_i8x16_s(a: v128) -> v128`
✅	`i16x8.extadd_pairwise_i8x16_u(a: v128) -> v128`
✅	`i32x4.extadd_pairwise_i16x8_s(a: v128) -> v128`
✅	`i32x4.extadd_pairwise_i16x8_u(a: v128) -> v128`

✅	`i8x16.add_sat_s(a: v128, b: v128) -> v128`
✅	`i8x16.add_sat_u(a: v128, b: v128) -> v128`
✅	`i16x8.add_sat_s(a: v128, b: v128) -> v128`
✅	`i16x8.add_sat_u(a: v128, b: v128) -> v128`
✅	`i8x16.sub_sat_s(a: v128, b: v128) -> v128`
✅	`i8x16.sub_sat_u(a: v128, b: v128) -> v128`
✅	`i16x8.sub_sat_s(a: v128, b: v128) -> v128`
✅	`i16x8.sub_sat_u(a: v128, b: v128) -> v128`

✅	`i16x8.q15mulr_sat_s(a: v128, b: v128) -> v128`

✅	`i8x16.min_s(a: v128, b: v128) -> v128`
✅	`i8x16.min_u(a: v128, b: v128) -> v128`
✅	`i16x8.min_s(a: v128, b: v128) -> v128`
✅	`i16x8.min_u(a: v128, b: v128) -> v128`
✅	`i32x4.min_s(a: v128, b: v128) -> v128`
✅	`i32x4.min_u(a: v128, b: v128) -> v128`
✅	`i8x16.max_s(a: v128, b: v128) -> v128`
✅	`i8x16.max_u(a: v128, b: v128) -> v128`
✅	`i16x8.max_s(a: v128, b: v128) -> v128`
✅	`i16x8.max_u(a: v128, b: v128) -> v128`
✅	`i32x4.max_s(a: v128, b: v128) -> v128`
✅	`i32x4.max_u(a: v128, b: v128) -> v128`

✅	`i8x16.avgr_u(a: v128, b: v128) -> v128`
✅	`i16x8.avgr_u(a: v128, b: v128) -> v128`
✅	`i8x16.abs(a: v128) -> v128`
✅	`i16x8.abs(a: v128) -> v128`
✅	`i32x4.abs(a: v128) -> v128`
✅	`i64x2.abs(a: v128) -> v128`

✅	`i8x16.shl(a: v128, y: i32) -> v128`
✅	`i16x8.shl(a: v128, y: i32) -> v128`
✅	`i32x4.shl(a: v128, y: i32) -> v128`
✅	`i64x2.shl(a: v128, y: i32) -> v128`
✅	`i8x16.shr_s(a: v128, y: i32) -> v128`
✅	`i8x16.shr_u(a: v128, y: i32) -> v128`
✅	`i16x8.shr_s(a: v128, y: i32) -> v128`
✅	`i16x8.shr_u(a: v128, y: i32) -> v128`
✅	`i32x4.shr_s(a: v128, y: i32) -> v128`
✅	`i32x4.shr_u(a: v128, y: i32) -> v128`
✅	`i64x2.shr_s(a: v128, y: i32) -> v128`
✅	`i64x2.shr_u(a: v128, y: i32) -> v128`

✅	`v128.and(a: v128, b: v128) -> v128`
✅	`v128.or(a: v128, b: v128) -> v128`
✅	`v128.xor(a: v128, b: v128) -> v128`
✅	`v128.not(a: v128) -> v128`
✅	`v128.andnot(a: v128, b: v128) -> v128`

✅	`v128.bitselect(v1: v128, v2: v128, c: v128) -> v128`
✅	`i8x16.popcnt(v: v128) -> v128`
✅	`v128.any_true(a: v128) -> i32`
✅	`i8x16.all_true(a: v128) -> i32`
✅	`i16x8.all_true(a: v128) -> i32`
✅	`i32x4.all_true(a: v128) -> i32`
✅	`i64x2.all_true(a: v128) -> i32`
✅	`i8x16.bitmask(a: v128) -> i32`
✅	`i16x8.bitmask(a: v128) -> i32`
✅	`i32x4.bitmask(a: v128) -> i32`
✅	`i64x2.bitmask(a: v128) -> i32`

➡️	`i8x16.eq(a: v128, b: v128) -> v128`
➡️	`i16x8.eq(a: v128, b: v128) -> v128`
➡️	`i32x4.eq(a: v128, b: v128) -> v128`
➡️	`i64x2.eq(a: v128, b: v128) -> v128`
➡️	`f32x4.eq(a: v128, b: v128) -> v128`
➡️	`f64x2.eq(a: v128, b: v128) -> v128`
➡️	`i8x16.ne(a: v128, b: v128) -> v128`
➡️	`i16x8.ne(a: v128, b: v128) -> v128`
➡️	`i32x4.ne(a: v128, b: v128) -> v128`
➡️	`i64x2.ne(a: v128, b: v128) -> v128`
➡️	`f32x4.ne(a: v128, b: v128) -> v128`
➡️	`f64x2.ne(a: v128, b: v128) -> v128`
➡️	`i8x16.lt_s(a: v128, b: v128) -> v128`
➡️	`i8x16.lt_u(a: v128, b: v128) -> v128`
➡️	`i16x8.lt_s(a: v128, b: v128) -> v128`
➡️	`i16x8.lt_u(a: v128, b: v128) -> v128`
➡️	`i32x4.lt_s(a: v128, b: v128) -> v128`
➡️	`i32x4.lt_u(a: v128, b: v128) -> v128`
➡️	`i64x2.lt_s(a: v128, b: v128) -> v128`
➡️	`f32x4.lt(a: v128, b: v128) -> v128`
➡️	`f64x2.lt(a: v128, b: v128) -> v128`
➡️	`i8x16.le_s(a: v128, b: v128) -> v128`
➡️	`i8x16.le_u(a: v128, b: v128) -> v128`
➡️	`i16x8.le_s(a: v128, b: v128) -> v128`
➡️	`i16x8.le_u(a: v128, b: v128) -> v128`
➡️	`i32x4.le_s(a: v128, b: v128) -> v128`
➡️	`i32x4.le_u(a: v128, b: v128) -> v128`
➡️	`i64x2.le_s(a: v128, b: v128) -> v128`
➡️	`f32x4.le(a: v128, b: v128) -> v128`
➡️	`f64x2.le(a: v128, b: v128) -> v128`
➡️	`i8x16.gt_s(a: v128, b: v128) -> v128`
➡️	`i8x16.gt_u(a: v128, b: v128) -> v128`
➡️	`i16x8.gt_s(a: v128, b: v128) -> v128`
➡️	`i16x8.gt_u(a: v128, b: v128) -> v128`
➡️	`i32x4.gt_s(a: v128, b: v128) -> v128`
➡️	`i32x4.gt_u(a: v128, b: v128) -> v128`
➡️	`i64x2.gt_s(a: v128, b: v128) -> v128`
➡️	`f32x4.gt(a: v128, b: v128) -> v128`
➡️	`f64x2.gt(a: v128, b: v128) -> v128`
➡️	`i8x16.ge_s(a: v128, b: v128) -> v128`
➡️	`i8x16.ge_u(a: v128, b: v128) -> v128`
➡️	`i16x8.ge_s(a: v128, b: v128) -> v128`
➡️	`i16x8.ge_u(a: v128, b: v128) -> v128`
➡️	`i32x4.ge_s(a: v128, b: v128) -> v128`
➡️	`i32x4.ge_u(a: v128, b: v128) -> v128`
➡️	`i64x2.ge_s(a: v128, b: v128) -> v128`
➡️	`f32x4.ge(a: v128, b: v128) -> v128`
➡️	`f64x2.ge(a: v128, b: v128) -> v128`

✅	`v128.load(m: memarg) -> v128`
➡️	`v128.load32_zero(m: memarg) -> v128`
➡️	`v128.load64_zero(m: memarg) -> v128`
➡️	`v128.load8_splat(m: memarg) -> v128`
➡️	`v128.load16_splat(m: memarg) -> v128`
➡️	`v128.load32_splat(m: memarg) -> v128`
➡️	`v128.load64_splat(m: memarg) -> v128`
➡️	`v128.load8_lane(m: memarg, x: v128, imm: ImmLaneIdx16) -> v128`
➡️	`v128.load16_lane(m: memarg, x: v128, imm: ImmLaneIdx8) -> v128`
➡️	`v128.load32_lane(m: memarg, x: v128, imm: ImmLaneIdx4) -> v128`
➡️	`v128.load64_lane(m: memarg, x: v128, imm: ImmLaneIdx2) -> v128`
➡️	`v128.load8x8_s(m: memarg)`
➡️	`v128.load8x8_u(m: memarg)`
➡️	`v128.load16x4_s(m: memarg)`
➡️	`v128.load16x4_u(m: memarg)`
➡️	`v128.load32x2_s(m: memarg)`
➡️	`v128.load32x2_u(m: memarg)`

✅	`v128.store(m: memarg, data: v128)`
➡️	`v128.store8_lane(m: memarg, data: v128, imm: ImmLaneIdx16)`
➡️	`v128.store16_lane(m: memarg, data: v128, imm: ImmLaneIdx8)`
➡️	`v128.store32_lane(m: memarg, data: v128, imm: ImmLaneIdx4)`
➡️	`v128.store64_lane(m: memarg, data: v128, imm: ImmLaneIdx2)`

✅	`f32x4.neg(a: v128) -> v128`
✅	`f64x2.neg(a: v128) -> v128`
✅	`f32x4.abs(a: v128) -> v128`
✅	`f64x2.abs(a: v128) -> v128`
✅	`f32x4.min(a: v128, b: v128) -> v128`
✅	`f64x2.min(a: v128, b: v128) -> v128`
✅	`f32x4.max(a: v128, b: v128) -> v128`
✅	`f64x2.max(a: v128, b: v128) -> v128`
✅	`f32x4.pmin(a: v128, b: v128) -> v128`
✅	`f64x2.pmin(a: v128, b: v128) -> v128`
✅	`f32x4.pmax(a: v128, b: v128) -> v128`
✅	`f64x2.pmax(a: v128, b: v128) -> v128`
✅	`f32x4.add(a: v128, b: v128) -> v128`
✅	`f64x2.add(a: v128, b: v128) -> v128`
✅	`f32x4.sub(a: v128, b: v128) -> v128`
✅	`f64x2.sub(a: v128, b: v128) -> v128`
✅	`f32x4.div(a: v128, b: v128) -> v128`
✅	`f64x2.div(a: v128, b: v128) -> v128`
✅	`f32x4.mul(a: v128, b: v128) -> v128`
✅	`f64x2.mul(a: v128, b: v128) -> v128`
✅	`f32x4.sqrt(a: v128) -> v128`
✅	`f64x2.sqrt(a: v128) -> v128`
✅	`f32x4.ceil(a: v128) -> v128`
✅	`f64x2.ceil(a: v128) -> v128`
✅	`f32x4.floor(a: v128) -> v128`
✅	`f64x2.floor(a: v128) -> v128`
✅	`f32x4.trunc(a: v128) -> v128`
✅	`f64x2.trunc(a: v128) -> v128`
✅	`f32x4.nearest(a: v128) -> v128`
✅	`f64x2.nearest(a: v128) -> v128`

✅	`f32x4.convert_i32x4_s(a: v128) -> v128`
✅	`f32x4.convert_i32x4_u(a: v128) -> v128`
✅	`f64x2.convert_low_i32x4_s(a: v128) -> v128`
✅	`f64x2.convert_low_i32x4_u(a: v128) -> v128`
✅	`i32x4.trunc_sat_f32x4_s(a: v128) -> v128`
✅	`i32x4.trunc_sat_f32x4_u(a: v128) -> v128`
✅	`i32x4.trunc_sat_f64x2_s_zero(a: v128) -> v128`
✅	`i32x4.trunc_sat_f64x2_u_zero(a: v128) -> v128`
✅	`f32x4.demote_f64x2_zero(a: v128) -> v128`
✅	`f64x2.promote_low_f32x4(a: v128) -> v128`

✅	`i8x16.narrow_i16x8_s(a: v128, b: v128) -> v128`
✅	`i8x16.narrow_i16x8_u(a: v128, b: v128) -> v128`
✅	`i16x8.narrow_i32x4_s(a: v128, b: v128) -> v128`
✅	`i16x8.narrow_i32x4_u(a: v128, b: v128) -> v128`

✅	`i16x8.extend_low_i8x16_s(a: v128) -> v128`
✅	`i16x8.extend_high_i8x16_s(a: v128) -> v128`
✅	`i16x8.extend_low_i8x16_u(a: v128) -> v128`
✅	`i16x8.extend_high_i8x16_u(a: v128) -> v128`
✅	`i32x4.extend_low_i16x8_s(a: v128) -> v128`
✅	`i32x4.extend_high_i16x8_s(a: v128) -> v128`
✅	`i32x4.extend_low_i16x8_u(a: v128) -> v128`
✅	`i32x4.extend_high_i16x8_u(a: v128) -> v128`
✅	`i64x2.extend_low_i32x4_s(a: v128) -> v128`
✅	`i64x2.extend_high_i32x4_s(a: v128) -> v128`
✅	`i64x2.extend_low_i32x4_u(a: v128) -> v128`
✅	`i64x2.extend_high_i32x4_u(a: v128) -> v128`

This allows it to be reused in submodules.

These are unary instructions, thus it is trivial to execute them at translation time when the input is an immediate value.

This allows this macro to be re-used elsewhere.

We rename this because it can be re-used for v128 store translation.

codecov · 2025-03-24T15:26:21Z

Codecov Report

Attention: Patch coverage is 65.87031% with 200 lines in your changes missing coverage. Please review.

Project coverage is 69.09%. Comparing base (9c7d4eb) to head (43d22c4).
Report is 1 commits behind head on main.

Files with missing lines	Patch %	Lines
crates/wasmi/src/engine/translator/simd/visit.rs	61.16%	80 Missing ⚠️
crates/wasmi/src/engine/executor/instrs.rs	76.80%	58 Missing ⚠️
crates/wasmi/src/engine/translator/simd/mod.rs	52.94%	32 Missing ⚠️
crates/wasmi/src/engine/executor/instrs/simd.rs	12.50%	28 Missing ⚠️
crates/core/src/typed.rs	0.00%	2 Missing ⚠️

Additional details and impacted files

@@            Coverage Diff             @@
##             main    #1421      +/-   ##
==========================================
+ Coverage   67.18%   69.09%   +1.91%     
==========================================
  Files         159      161       +2     
  Lines       15169    15724     +555     
==========================================
+ Hits        10191    10865     +674     
+ Misses       4978     4859     -119

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This makes it more flexible and usable for SIMD shift ops.

Robbepop added 13 commits March 24, 2025 12:46

move bail_unreachable macro to utils

686513f

This allows it to be reused in submodules.

implement v128.const and splat instruction translation

b795f6f

actively control simd config in tests

733672b

un-ignore simd_const and simd_splat tests

851c4ed

remove immediate variants of SIMD splat

1c7ca66

These are unary instructions, thus it is trivial to execute them at translation time when the input is an immediate value.

support v128.const in initializer expressions

b475b29

move impl_unary_impls macro to utils submodule

16f3dd0

This allows this macro to be re-used elsewhere.

implement v128.splat ops execution

7cf8918

fix broken doc links

348d478

rename macro

e8050ed

add utils::impl_binary_executors macro and deduplicate code

ae4cbfa

re-use impl_unary_executors in conversions

1a02cee

implement i32x4 and i64x2 {add,sub,mul} ops

474c97e

Robbepop changed the title ~~Implement Wasm simd proposal's v128.const and splat ops~~ Implement initial set of Wasm simd proposal instruction translation and execution Mar 24, 2025

Robbepop changed the title ~~Implement initial set of Wasm simd proposal instruction translation and execution~~ Implement translation and execution for some Wasm simd proposal instructions Mar 24, 2025

Robbepop mentioned this pull request Mar 24, 2025

Implement the Wasm simd proposal #1364

Closed

fix build issue with simd feature disabled

3c105fd

Robbepop changed the title ~~Implement translation and execution for some Wasm simd proposal instructions~~ Implement translation and execution for some initial Wasm simd instructions Mar 24, 2025

Robbepop added 5 commits March 24, 2025 14:22

rename translate_fstore -> translate_store

175332a

We rename this because it can be re-used for v128 store translation.

re-order V128StoreOffset16 fields to align it with other instructions

e96a6b1

add translation for v128.{load,store}

a6342a1

implement v128.{load,store} execution

5755ed5

un-ignore all SIMD tests that already pass

60fac4c

Robbepop added 6 commits March 24, 2025 16:53

implement translation and execution of SIMD extract-lane ops

a040f30

move visit methods

5e1f186

add translation and execution of i8x16.swizzle

bf7f5d9

add support for i8x16.{add,sub}[_sat_{s,u}] SIMD ops

8478fcb

apply rustfmt

dd6acb3

fix intra doc link

85994fd

Robbepop added 25 commits March 25, 2025 11:15

un-ignore passing SIMD tests

5c27dc9

fix overflow bug in integer abs SIMD ops

41830fb

implement unary float SIMD ops

7ee5b25

fix bug in f64x2_mul translation

f694b97

un-ignore passing SIMD tests

4a17c06

fix typo in impl_from_typed_value_for macro

3921963

re-design wasmi_ir::ShiftAmount type and API

2c06a93

This makes it more flexible and usable for SIMD shift ops.

add SIMD shift ops translation

65c4929

apply rustfmt

23b4ac9

add SIMD shift instruction execution

ae0670a

make IntoShiftAmount design even more flexible

318593f

implement SIMD shift_by executors

5f1f50e

un-ignore passing SIMD tests

1aade9b

add comments

ed68e3b

add support for bitwise SIMD ops

c7f3a02

add support for SIMD i8x16.popcnt

abb800d

un-ignore passing SIMD tests

136b251

add support for SIMD extend ops

83bb11a

un-ignore passing SIMD test

5ccd37d

make translate_simd_unary more generic and efficient

19a987a

support SIMD bitwise conditionals

1383562

support SIMD float int conversion ops

699a83d

un-ignore passing SIMD tests

5f6972d

support narrowing SIMD ops

3a31786

implement v128.bitselect SIMD instruction

f89b6f9

Robbepop changed the title ~~Implement translation and execution for some initial Wasm simd instructions~~ Add support for most Wasm simd instructions in the wasmi crate Mar 25, 2025

Robbepop changed the title ~~Add support for most Wasm simd instructions in the wasmi crate~~ Add support for most Wasm simd instructions to the wasmi crate Mar 25, 2025

fix intra doc link

43d22c4

Robbepop merged commit 3eb2ac0 into main Mar 25, 2025
18 of 19 checks passed

Robbepop deleted the rf-implement-simd-splat branch March 25, 2025 17:36

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Add support for most Wasm `simd` instructions to the `wasmi` crate #1421

Add support for most Wasm `simd` instructions to the `wasmi` crate #1421

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Add support for most Wasm simd instructions to the wasmi crate #1421

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Add support for most Wasm `simd` instructions to the `wasmi` crate #1421

Add support for most Wasm `simd` instructions to the `wasmi` crate #1421

Robbepop commented Mar 24, 2025 •

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