Support SSE legacy instructions for the SInglepass compiler #2767
Comments
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It would be great to have a PR so we can take a look. We should emit the optimal AVX code when possible (if the CpuFeature::AVX is available on the host) and SSE 4.2 in case CpuFeature::SSE42 is present (and not AVX). The target already contains the cpu_features, and the Target is provided to the compiler when compiling, so we can get the features from there. https://docs.rs/wasmer/2.0.0/wasmer/struct.Target.html#method.cpu_features |
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Adding @ptitSeb to also confirm from our side that everything should be good with this strategy |
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Sounds good to me (and requiring AVX is a bit overkill, so I'm good with an SSE only option) |
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I've hacked together a decent amount of the SSE code, so I will do a bit of clean up and can start a PR. If we go with SSE 4.2 only, this will be pretty easy I think. If we want to support older SSE, this will require more work and I haven't finished investigating how much. |
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I think SSE 4.2 should be fine for now (we can always add more support for older SSE apart) |
2775: Support SSE 4.2 for the Singlepass compiler r=ptitSeb a=batconjurer Closes #2767 # Description This PR adds support for the SSE 4.2 instruction set in the singlepass compiler. Previously, only AVX was supported. This implementation may also work for SSE 4.1, but this should be double checked. It does use the `blendvps` instruction indroduced in SSE 4.1, so it cannot support any earlier SSE versions at present for sure. The following are the main changes: - The assembler has changed from a Vec<X64Relocation> to a struct containing this as well as the corresponding CPU feature (indicating AVX/SSE4.2/...) - A set of SSE function macros have been added. To handle non-destructive operations, additional moves may be made before executing the corresponding SSE instruction if `src1 != dst` - A minor change to the `EmitterX64` trait. It now has a function for returning a possible CPU feature. - The implementation of `EmitterX64` for the assembler has obviously changed. It chooses the emitted assembly based on the CPU feature. Co-authored-by: R2D2 <[email protected]> Co-authored-by: Jacob Turner <[email protected]>
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Hello! I new learning near and sandbox and I have the next problem and I found this issue near/near-workspaces-rs#110 Im not sure how to proceed because I am having problems to test my contracts. Any idea? Thanks. |
Motivation
I am trying to run a block chain node on my home server and the chain uses wasmer for its smart contracts. My server uses the legacy SSE 4.2 instructions so when trying to compile the wasm code using the singlepass compiler, I get an error because only the newer AVX instructions are supported.
We should support these legacy instructions as many machines out there still use them and new computers are still being sold with chips that use them.
Proposed solution
I looked at
emitter_x64.rsand I see that the AVX instructions used mostly have an SSE counterpart. Non-destructive instructions were introduced in AVX. For SSE, to achieve the same behavior, requires two instructions: A move and then the destructive instruction.Some ops such as blendvps only have support on SSE 4.1, so it will have to mimicked for older SSE versions if those are to be supported.
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