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[Build] Marlin: drop SM12x-specific cubins and rely on compute_80 PTX - #65540

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mgoin:marlin-sm12x-ptx
Nov 4, 2026
Merged

vllm-bot merged 5 commits into
vllm-project:mainfrom
mgoin:marlin-sm12x-ptx

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@mgoin

@mgoin mgoin commented Nov 4, 2026 •

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Overview

Part of #65560.

Revert the SM12x-specific cubins that #40923 added for the fp16/bf16 Marlin and Marlin-MoE kernels, and go back to building them as 8.0+PTX only. On SM12x the driver JIT-compiles the existing PTX (compute_80 for fp16, compute_90 for bf16), which on current main is correct and runs at the same speed.

Claims

  • [Kernel] Marlin MoE: include SM 12.x in default arch list #40923's premise (Marlin-MoE gives wrong output on SM12x without native cubins) does not reproduce on current main: Marlin kernel tests and an end-to-end Marlin-MoE eval through the PTX JIT match the native-cubin build on GB10 (SM121).
  • Removes the sm_120 SASS for every fp16/bf16 Marlin and Marlin-MoE kernel from multi-arch builds (with TORCH_CUDA_ARCH_LIST="8.0;9.0;12.0": _C_stable_libtorch 74.6 → 70.0 MB, _moe_C_stable_libtorch 35.0 → 29.0 MB, −10.6 MB total; compile time for these two targets 656 s → 593 s).
  • Cost: a one-time PTX JIT on SM12x, about +5–9 s on a cold driver JIT cache (~/.nv/ComputeCache); nothing once the cache is warm.

Validation

All on DGX Spark (GB10, SM121), CUDA 13.0, built with TORCH_CUDA_ARCH_LIST=12.1. Confirmed with cuobjdump that the PR build has no sm_120 SASS for the fp16/bf16 Marlin kernels (only sm_80/sm_90 SASS + compute_80/compute_90 PTX), so every test below goes through the JIT.

Check main (native sm_120) this PR (PTX JIT)
tests/kernels/quantization/test_marlin_gemm.py 520 passed, 2 failed 522 passed
tests/kernels/moe/test_moe.py -k marlin 305 passed, 6 skipped 305 passed, 6 skipped
gpt-oss-20b, --moe-backend marlin, GSM8K (100 q) 0.36, 1395 tok/s 0.33, 1400 tok/s
Startup to /health, cold JIT cache, Qwen2.5-3B-GPTQ-Int4 90.6 s / 89.1 s 97.8 s
Startup to /health, cold JIT cache, gpt-oss-20b Marlin MoE 30.4 s / 26.3 s 35.5 s

The main column uses the precompiled main wheel. Its 2 dense failures were not investigated, and they did not occur with the PR build. The GSM8K gap is within noise for 100 questions. Output is coherent, not the gibberish described in #40923.

vllm serve openai/gpt-oss-20b --moe-backend marlin --max-model-len 8192
python tests/evals/gsm8k/gsm8k_eval.py --port 8000 --num-questions 100

Details

  • MARLIN_ARCHS, MARLIN_BF16_ARCHS and MARLIN_MOE_ARCHS go back to 8.0+PTX (bf16 keeps 9.0+PTX for the atomicAdd path). The CUDA < 13.0 12.0a;12.1a branches go too.
  • The FP8-activation kernels (MARLIN_FP8_ARCHS / MARLIN_MOE_FP8_ARCHS) keep their 8.9/12.x targets: they use e4m3 MMA, which compute_80 PTX cannot express. [Kernel] Marlin: remove 8-bit (INT8/FP8) activation support, rely on Humming #65542 removes Marlin's 8-bit activation paths entirely in favor of Humming; the two PRs are independent.
  • A build that targets only SM12x gets bigger (sm_80 SASS + PTX instead of only sm_120 SASS: 46.0/27.0 MB vs 37.3/15.5 MB for _C_stable_libtorch/_moe_C_stable_libtorch). The release wheel targets many archs and already ships the sm_80 + PTX copy, so it only loses the sm_120 copy.

Not a duplicate: no open PR changes these arch lists (searched "marlin PTX sm120", "marlin 12.0f").


Pull Request Checklist
  • I used vLLM's /pr-checklist skill. (Mandatory for agents, optional for humans).

  • AI assistance was used during the creation of this PR.

  • Design Fit: Minimizes impact on core components, reuses existing functionality, and justifies added complexity.

  • Testing and Validation: Validates the change and ensures any added tests are meaningful and reliable, with CI coverage or documented CI resource constraints and validation performed outside CI.

  • Code Quality and Style: Keeps code and comments clear and concise, and updates relevant documentation and examples.

  • Pull Request Contents: Includes a brief summary and relevant links, supports claims with evidence, explains root causes and implementation trade-offs, and follows the contributing guide.

🤖 Generated with Claude Code

PR vllm-project#40923 added native SM12x cubins for the fp16/bf16 Marlin and Marlin-MoE
kernels, attributing incorrect MoE output on SM12x to the 8.0+PTX fallback.
That does not reproduce on current main: with Marlin built as 8.0+PTX only,
the driver JIT-compiles the compute_80 PTX on SM121 and the Marlin kernel
tests and an end-to-end Marlin-MoE GSM8K run match the native-cubin build.

Go back to 8.0+PTX for MARLIN_ARCHS, MARLIN_BF16_ARCHS and MARLIN_MOE_ARCHS.
The FP8-activation kernels keep their 8.9/12.x targets since they need
e4m3 MMA, which compute_80 PTX cannot express.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Signed-off-by: mgoin <mgoin64@gmail.com>

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This pull request is from a fork — automated review is disabled. A repository maintainer can comment @claude review to run a one-time review.

@mergify mergify Bot added the ci/build label Nov 4, 2026
@mgoin

mgoin commented Nov 4, 2026

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/ci run

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github-actions Bot commented Nov 4, 2026

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✅ Triggered Buildkite CI #99787 for commit 752a49ef0497.

ℹ️ This PR is 1 commit behind upstream main. Merged upstream main into this branch as 752a49ef0497 before starting CI. Pull the branch before pushing more changes.

Signed-off-by: Misha Goin <mgoin64@gmail.com>
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vllm-bot merged commit 0cb25c3 into vllm-project:main Nov 4, 2026
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4 participants