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On SM100 the MQA logits kernels take BF16 weights, and mqa_logits_mx_inputs converted the FP32 weights fused_q wrote with a copy kernel on every indexer call. Let fused_q (Triton and CuTeDSL) write the weights in the dtype the logits kernels take, so the conversion is a no-op. The weights are still computed in FP32 and rounded once, so the logits are unchanged. Signed-off-by: haosdent <haosdent@gmail.com>
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Same answer as on #62172: main already rounds these weights to BF16 in |
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Overview
On SM100,
fused_qnow writes the DSA indexer weights directly in BF16, the dtype DeepGEMM's MQA logits kernelstake. This removes the FP32 to BF16 copy
mqa_logits_mx_inputslaunched on every indexer call.Claims
drops 2.8%, 2.5%, 1.5% and 1.5% at concurrency 1, 4, 8 and 16 (main vs main: within 0.7%). This PR is
about 1/6 of that.
fused_q(DeepSeek-V3.2, GLM-5.x).
separate
.to(torch.bfloat16)inmqa_logits_mx_inputs.fused_qnowdoes that rounding in its store, and the kernels get bit-identical weights.
Validation
tests/kernels/test_fused_deepseek_v32_norm_rope.pyon B300 (SM103): 214 passed, 8 skipped. The weightassertions now check BF16 output on SM100 and FP32 elsewhere.
Bit-identity on B300: for 5.3M weights (Triton and CuTeDSL kernels, GLM-5.2 and DeepSeek-V3.2 shapes, 1 to 4096
tokens), the BF16 output matches main's FP32 output followed by
.to(torch.bfloat16)in every bit.InferenceX AgentX, GLM-5.3-NVFP4 on 4x GB200, main + [Perf] Emit the DSA indexer weights in BF16 on SM100 #62170, [Perf][Kernel] Size cooperative_topk's single pass by row length, not stride #62171 and [Perf][Kernel] Let cooperative_topk read the BF16 indexer logits #62172 vs main (median per-turn change
on the same turns, 95% CI; setup below):
Target verify forward (
vllm bench forward, GLM-5.2-NVFP4, TP4, B300, MTP verify shapes, spread < 0.1%):-0.18% to -0.34% at 1, 3 and 7 requests, 25K and 94K context.
Exactness: with real MTP verification on 32 GSM8K questions (greedy), the three changes together give the same
outputs and the same acceptance length (3.4904) as main.
MRCR (OpenAI, 8 needles, 594 samples), GLM-5.3-NVFP4 on 4x GB200, TP4, greedy, thinking off; main vs main +
[Perf] Emit the DSA indexer weights in BF16 on SM100 #62170, [Perf][Kernel] Size cooperative_topk's single pass by row length, not stride #62171 and [Perf][Kernel] Let cooperative_topk read the BF16 indexer logits #62172. Difference is the paired per-sample mean with a 95% bootstrap CI:
The 256K bin varies between runs, so it was run twice more for each:
Pooled over the three runs, the difference is -0.019 [-0.069, +0.031].
InferenceX AgentX setup and results for all GLM-5.3 PRs (4x GB200)
InferenceX c801c9f2d AgentX scenario (pinned AIPerf), 20-minute fast mode, GLM-5.3-NVFP4 rev e3b8f9f2, TP4, MTP 3
with synthetic acceptance 2.99, native KV offload 135 GB per rank, Rust frontend,
max-num-seqs= 2 xconcurrency. vLLM main dcd0796 with its default backends and CUDA graph config, plus the PRs cumulatively in
the order below (FlashInfer with flashinfer-ai/flashinfer#6630, flashinfer-ai/flashinfer#6631 and
flashinfer-ai/flashinfer#6632 from #62174 on). One FlashInfer MoE autotune per concurrency, shared by all
variants. A fresh server per point, with the page cache dropped before each, and main run again at the end of
each concurrency as an A/A check. SGLang a916d91cd3 with IMEX, TRT-LLM
all-reduce fusion and
--mem-fraction-static 0.90.Each cell is the median, over the turns both runs finished (150 to 520), of the per-turn ratio to the previous
variant, with a 95% paired bootstrap CI. Decode is request latency minus TTFT. The bootstrap does not include
run-to-run variance; the main-vs-main row does.
KV cache tokens per GPU (c=1 / 4 / 8 / 16): main 1,176,832 / 1,162,880 / 1,143,872 / 1,105,984; with all PRs
1,178,496 / 1,168,512 / 1,157,824 / 1,103,936. Window throughput (tok/s/GPU) moves up to 2.4% between runs in fast
mode, since it counts whichever long-context turns finish inside the 20 minutes; with all PRs it is +3.0%, -1.4%,
+4.8% and +1.2% at c=1/4/8/16.
vLLM vs SGLang, decode time per turn on the same turns (positive = vLLM slower):
#62170, #62171 and #62172 were measured as one group.
vllm bench forward(target verify forward, spread < 0.1%)splits their gain about 1/6, 1/2 and 1/3. #62173 changes only decode steps of 3, 5 or 7 requests; steps with 3 or
more requests are 0%, 4%, 13% and 37% of all steps at c=1/4/8/16. At c=1 both runs capture the same graphs, so
its +0.5% there is noise. At c=16, three more runs each of + #62174 and + #62173 (4 runs each, compared as
runs): decode time -0.54% [-0.93, -0.16], with every + #62173 run faster than every + #62174 run (permutation
p = 2/70); e2e latency -0.29% [-1.41, +0.82].
Details
mqa_logits_use_mx_scales()already decides that the SM100 logits kernels take BF16 weights, andmqa_logits_mx_inputsreturnedweights.to(torch.bfloat16). That was a real copy kernel for every indexer call,since
fused_q(Triton and CuTeDSL) always wrote FP32.fused_qnow allocates its weights output in the dtype thelogits kernels take, and both kernels cast on store.
.to(torch.bfloat16)then returns the tensor as-is.The CuTeDSL kernel's compile key gains the output dtype.
Pull Request Checklist
I used vLLM's
/pr-checklistskill. (Mandatory for agents, optional for humans).AI assistance was used during the creation of this PR.
Design Fit: Minimizes impact on core components, reuses existing functionality, and justifies added complexity.
Testing and Validation: Validates the change and ensures any added tests are meaningful and reliable, with CI coverage or documented CI resource constraints and validation performed outside CI.
Code Quality and Style: Keeps code and comments clear and concise, and updates relevant documentation and examples.
Pull Request Contents: Includes a brief summary and relevant links, supports claims with evidence, explains root causes and implementation trade-offs, and follows the contributing guide.