[Perf][MiniMax-M3] Tune SM100 sparse decode

[wolfcomos]

Overview

Tune MiniMax-M3 Triton sparse decode on SM100 with an SM-count-based split policy and optional FP16 dot operands. BF16 remains the default.

Draft blocker: default BF16 regresses on GSM8K by 0.9856 percentage points, exceeding the predeclared local 0.5-point limit. This needs investigation before merge.

Claims

• Support non-power-of-two splits using the existing decode and merge kernels, targeting two CTAs per SM.
• Allow FP16 dot operands through AttentionConfig, with FP32 accumulation.

Validation

Measurements compare a450316 against 9731f30. The subsequent commit only renames the constexpr to USE_FP16_DOT; normalized AST and pre-commit checks pass. Scripts, complete results, runtime details and reproduction instructions are published separately. Identical development binaries may not be publicly available.

GSM8K: all 1,319 questions, five-shot, pretrained nvidia/MiniMax-M3-NVFP4, TP4 on four GB200 GPUs, FP8 KV cache, eager MRV1 and Triton decode. Greedy decoding, seed 42, thinking disabled, 1,024-token output limit and batch limit 40.

Mode	Correct / 1,319	Accuracy
Baseline	1,259	95.4511%
Candidate BF16	1,246	94.4655%
Candidate FP16	1,260	95.5269%

FP16 passes the local gate; the default BF16 regression remains unresolved. All runs have zero invalid or truncated answers. One diagnostic baseline repeat reproduced every output token sequence exactly. Candidate runs used identical prompts and reused byte-identical baseline FlashInfer tactics through a validation-only cache-seeding hook. Telemetry confirmed the changed split counts and requested dot precision.

Original tests: full, unfiltered GB200 runs passed: baseline 181 passed / 46 skipped, candidate 199 passed / 46 skipped. Original cases are preserved; skips are identical ROCm-only cases. Ruff, mypy and changed-file pre-commit checks pass.

Test commands and CI coverage

.venv/bin/python -m pytest -q tests/kernels/attention/test_minimax_m3.py
.venv/bin/python -m pytest -q tests/kernels/test_minimax_m3_sparse_attn_fp8_scale.py
.venv/bin/python -m pytest -q tests/kernels/attention/test_minimax_m3_fp8_triton_indexer.py
.venv/bin/python -m pytest -q tests/kernels/attention/test_minimax_m3_msa_cutlass_sparse_decode.py

Existing B200 CI covers the main attention file. New SM100 FP8-scale cases were validated manually on GB200; that file's explicit CI entries target ROCm. No CI files changed.

Kernel performance: synthetic full decode + merge on GB200, warm CUDA graphs, seven rotated paired rounds across 24 shapes.

Mode	Geometric mean speedup	Across-shape range
BF16	1.120×	0.989–1.608×
FP16 opt-in	1.136×	0.928–1.631×

Each shape uses the median of paired speedup ratios. The sweep includes 21 scalar-FP8 cases and three controls; two controls fall back to BF16. Small-batch regressions remain, and FP16 adds little beyond split tuning in most scalar-scale cases. These timings exclude host planning and compilation and do not establish serving throughput. Per-round variability is in the supplement.

All 24 timed shapes and 38 edge cases pass FP32-reference and graph checks, including batch-invariant, layout, dtype-fallback and active-row padding coverage. Separate range tests cover finite FP16 saturation.

Details

The old policy targets 256 CTAs and rounds splits down to a power of two. The new SM100 policy uses the GPU's SM count and masks padded merge lanes. Other architectures and batch-invariant mode retain the original split policy; prefill and CUTLASS decode are unchanged.

Enable FP16 with --attention-config '{"minimax_m3_msa_decode_fp16_dot": true}'. It applies to SM100 BF16-query/FP8-KV Triton decode with absent or scalar scales and batch-invariant mode disabled. Q and scaled K/V saturate to the finite FP16 range. Split changes can alter reduction rounding; FP16 additionally changes operand precision.

Scalar-scale folding is excluded because #52060 covers it. Related #56932 targets SM120 page splitting and SM103/SM120 single-page decode; #55372 explores query-tiled speculative verification.

Derived from 97e0532 and 5c353c3. Xin Li and Suyog Gupta are credited as co-authors. AI assistance was used for implementation, review and validation.

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Pull Request Checklist

• I used vLLM's /pr-checklist skill.
• AI assistance was used during the creation of this PR.
• Design Fit: Reuses the existing decode and merge kernels.
• Testing and Validation: Kernel tests pass; default BF16 GSM8K regression remains unresolved.
• Code Quality and Style: Changed-file hooks pass.
• Pull Request Contents: Includes scope, evidence, limitations and attribution.

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