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[CI][Intel] Skip ROCm-only test_topk_gating_enabled_by_cdna on XPU - #61932
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This test patches vllm.platforms.rocm.get_cdna_version and asserts rocm_aiter_ops.is_topk_gating_enabled() behavior, which is specific to AMD CDNA3/CDNA4 + AITER MoE and is not applicable on Intel XPU. Deselect the whole test (all parametrized cases) in the Intel Model Executor CI job. Signed-off-by: Chaojun Zhang <chaojun.zhang@intel.com>
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✅ Triggered Buildkite CI #95315 for commit ℹ️ This PR is 8 commits behind upstream |
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…llm-project#61932) Signed-off-by: Chaojun Zhang <chaojun.zhang@intel.com> Co-authored-by: vllm-agent <claw@inferact.ai>
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Overview
Skip the ROCm/CDNA-only
test_topk_gating_enabled_by_cdnatest in the Intel XPU Model Executor CI job.Claims
Validation
Verified locally with
pytest --collect-onlyintests/:Details
test_topk_gating_enabled_by_cdnaexercisesrocm_aiter_ops.is_topk_gating_enabled()behavior gated on AMD CDNA3/CDNA4 + AITER MoE and is not applicable to Intel XPU. A single--deselectnaming the test function (without parameter IDs) correctly excludes all of its parametrized variants, as long as the nodeid path is given relative to the pytest rootdir (tests/...), matching the style already used elsewhere in this file.Pull Request Checklist
I used vLLM's
/pr-checklistskill. (Mandatory for agents, optional for humans).AI assistance was used during the creation of this PR.
Design Fit: Minimizes impact on core components, reuses existing functionality, and justifies added complexity.
Testing and Validation: Validates the change and ensures any added tests are meaningful and reliable, with CI coverage or documented CI resource constraints and validation performed outside CI.
Code Quality and Style: Keeps code and comments clear and concise, and updates relevant documentation and examples.
Pull Request Contents: Includes a brief summary and relevant links, supports claims with evidence, explains root causes and implementation trade-offs, and follows the contributing guide.