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[ROCm][Attention] Honor VLLM_ROCM_USE_AITER=1 by ranking ROCM_AITER_FA above ROCM_ATTN - #61332
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…A above ROCM_ATTN ROCM_ATTN sat ahead of ROCM_AITER_FA in _get_backend_priorities(), so selection picked it whenever valid and the explicit AITER MHA opt-in only controlled list membership, never the winner. Append AITER FA before ROCM_ATTN when is_mha_enabled() (env opt-in, CDNA-gated via @if_aiter_supported), keeping ROCM_ATTN as the fallback for configs AITER FA rejects (head sizes outside 64/128/256, non-fp16/bf16). Selection tests now refresh rocm_aiter_ops' import-time env flags, which the selection path never did, so the old VLLM_ROCM_USE_AITER=1 expectation was insensitive to the flag. Fixes vllm-project#46596 Co-authored-by: ZCode Agent <zcode-agent@users.noreply.github.com> Signed-off-by: ra1n <xxraincandyxx@gmail.com>
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Tested this PR end to end on gfx950. Setup: one MI350X, the stable Backend chosen. Stock logs Speed and perplexity. Decode tokens/s at ~200 / 2k / 12k / 30k prompt tokens, all on the same droplet:
One gfx950 caveat, not caused by this PR: until an AITER release includes ROCm/aiter#6336, bf16 KV with MTP on Disclosure: an AI assistant (Claude) helped run these measurements and draft this comment. I reviewed it and can re-run any of it. |
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This pull request has merge conflicts that must be resolved before it can be |
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Data point from stock With
So leaving the flag out costs about 7x at 30k on the current stable release. Disclosure: an AI assistant (Claude) helped run these tests and draft this comment; I reviewed it. |
Overview
On CDNA (MI300X/MI325X/MI355X),
VLLM_ROCM_USE_AITER=1never selectedROCM_AITER_FAfor MHA decode:ROCM_ATTNsits ahead of it in_get_backend_priorities()and wins whenever it is valid. This demotesROCM_ATTNbelow the explicit AITER opt-in, so the opt-in is honored. Fixes #46596.Claims
VLLM_ROCM_USE_AITER=1(and defaultVLLM_ROCM_USE_AITER_MHA=1) on CDNA, MHA decode now selectsROCM_AITER_FAinstead ofROCM_ATTN, matching the documented behavior in the ROCm attention-backend blog.VLLM_ROCM_USE_AITER_MHA=0, selection is byte-for-byte identical to before. RDNA is untouched (is_mha_enabled()is falsy off CDNA via@if_aiter_supported). The KV-connector path (which excludesROCM_ATTNand already picksROCM_AITER_FAfirst) is unchanged.ROCM_AITER_FArejects (head sizes outside 64/128/256, non-fp16/bf16, non-decoder attention) still fall back toROCM_ATTN, which remains in the list directly behind it.Validation
Unit —
tests/v1/attention/test_rocm_attention_backends_selection.py, 78 passed on MI300X (gfx942, ROCm 7.14):VLLM_ROCM_USE_AITER=1→ROCM_AITER_FA(fails on the unfixed code — verified by stashing only therocm.pychange).ROCM_ATTNaccepts) with the opt-in → falls back toROCM_ATTN.use_kv_connector=True→ stillROCM_AITER_FA.refreshed_aiter_envautouse fixture:rocm_aiter_opscaptures env flags at import time and nothing in the selection path refreshed them, so the old Case 6 assertion was insensitive to the flag; the fixture syncs flags around each test.End-to-end — Qwen/Qwen3-0.6B (MHA, head_dim 128), single MI300X (gfx942, DKMS amdgpu 6.19.14, ROCm 7.14), greedy:
VLLM_ROCM_USE_AITER=1: engine logOverriding with ROCM_AITER_FA out of potential backends: ['ROCM_AITER_FA', 'ROCM_ATTN', 'ROCM_AITER_UNIFIED_ATTN', 'TRITON_ATTN']— before this change the same line endedOverriding with ROCM_ATTN. The engine instantiates the AITER FA backend and proceeds through model load and warmup.Overriding with ROCM_ATTN out of potential backends: ['ROCM_ATTN', 'ROCM_AITER_UNIFIED_ATTN', 'TRITON_ATTN']; greedy generation completes on ROCM_ATTN.pa_v1JIT module fails to compile under the venv'srocm_sdk_develhipcc (ck_tile"only one target architecture can be defined during device compile" static assert), a toolchain mismatch unrelated to this change. The failure occurs inside the aiter kernel build, after backend selection — AMD CI builds/run these kernels on matched ROCm stacks.Performance: this change makes the fast path automatic for opt-in users; the expected magnitudes are those measured by the issue reporter on 8× MI300X (Qwen3-VL-235B-FP8 + EAGLE3: spec-decode TPOT 11.10→5.62 ms at mc=1, throughput 416→1083 tok/s at mc=16 when forcing
ROCM_AITER_FAmanually — exactly what selection now does automatically). I did not re-measure the 235B workload; the small-model run above validates selection and correctness only.Details
Root cause:
_get_backend_priorities()appendedROCM_AITER_FAafterROCM_ATTN; selection picks the first valid candidate, so the explicit opt-in only controlled list membership, never the winner. The fix moves theis_mha_enabled()append above theROCM_ATTNappend, keepingROCM_ATTNin the list as the fallback for configs AITER FA rejects.Not in scope, deliberately: making AITER the default (closed #21805 / #21366 territory), and skipping
ROCM_ATTNfor sliding-window models (#42798 — separate, and both backends declare SWA support so no interaction here). This also removes the main manual-override users needed for the workaround recommended in #60316 (PD workers with KV connectors, whereROCM_ATTNis excluded anyway andROCM_AITER_FAis already first).Pull Request Checklist
I used vLLM's
/pr-checklistskill. (Mandatory for agents, optional for humans).AI assistance was used during the creation of this PR.
Design Fit: Minimizes impact on core components, reuses existing functionality, and justifies added complexity.
Testing and Validation: Validates the change and ensures any added tests are meaningful and reliable, with CI coverage or documented CI resource constraints and validation performed outside CI.
Code Quality and Style: Keeps code and comments clear and concise, and updates relevant documentation and examples.
Pull Request Contents: Includes a brief summary and relevant links, supports claims with evidence, explains root causes and implementation trade-offs, and follows the contributing guide.